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Not usable FPGA pin

Status: Open.

#9 In smartbench/mainboard;

· akukulanski opened on Mar 6, 2018

main op amp high bias

Status: Open.

#8 In smartbench/mainboard;

· akukulanski opened on Mar 5, 2018

Values of input capacitors

Status: Open.

#7 In smartbench/mainboard;

· akukulanski opened on Mar 5, 2018

Wrong footprint protection diodes

Status: Open.

#6 In smartbench/mainboard;

· akukulanski opened on Mar 5, 2018

USB footprint

Status: Open.

#5 In smartbench/mainboard;

· akukulanski opened on Mar 5, 2018

PGA resistances

Status: Open.

#4 In smartbench/mainboard;

· akukulanski opened on Mar 5, 2018

ADC Clock

Status: Open.

#3 In smartbench/mainboard;

· akukulanski opened on Feb 24, 2018

Redraw three traces

Status: Open.

#2 In smartbench/mainboard;

· nahuel-cci opened on Sep 7, 2017

Remove corner

Status: Open.

#1 In smartbench/mainboard;

· nahuel-cci opened on Sep 7, 2017