HDL Code Learning Project

Overview

This repository contains Hardware Description Language (HDL) code created during my journey learning hardware programming. The project is organized into weekly modules, each focusing on different hardware components and concepts.

Project Structure

Week 6 (WK6)

• Basic HDL implementations

Week 8 (WK8)

• DisplayCounter: 4-bit counter (0-15) with 7-segment display output
• Inc4Bit: 4-bit incrementer
• Mux4: 4-bit multiplexer
• Register4Bit: 4-bit register
• SevenSegDecoder: Decoder for seven-segment display
• 7segmentdisplay.py: Python script for display simulation

Week 9 (WK9)

• P2S: Parallel-to-Serial converter
• Shift4bit and Shift8bit: Shift registers
• Transmit: Data transmission simulation

Usage

Each component has corresponding test files (.tst) and expected output files (.cmp) that can be used to verify the functionality of the HDL implementations.

To test a component, use the appropriate test file with an HDL simulator that supports the syntax used in this project.

Learning Focus

This project covers fundamental hardware components including:

• Counters and registers
• Multiplexers
• Seven-segment display drivers
• Serial/parallel conversion
• Shift registers

Notes

This repository is for educational purposes as part of my journey learning hardware programming concepts.

Github Link

https://github.com/jeff283/HDL-Code-1860