Update README.md

jakubcabal · jakubcabal · commit c819e414bf44 · 2015-07-24T22:17:16.000+02:00
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 # Simple UART for FPGA
 
 Simple UART (Universal Asynchronous Receiver & Transmitter) module for serial communication with an FPGA. The UART module was implemented using VHDL.
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+###UART module is not yet completed. Stay tuned!
