jakubcabal
diff --git a/‎example/rst_sync.vhd‎ ‎examples/common/rst_sync.vhd‎example/rst_sync.vhd renamed to examples/common/rst_sync.vhd b/‎example/rst_sync.vhd‎ ‎examples/common/rst_sync.vhd‎example/rst_sync.vhd renamed to examples/common/rst_sync.vhd
diff --git a/‎example/quartus/uart_loopback_cyc1000.qpf‎ ‎…opback/quartus/uart_loopback_cyc1000.qpf‎example/quartus/uart_loopback_cyc1000.qpf renamed to examples/loopback/quartus/uart_loopback_cyc1000.qpf b/‎example/quartus/uart_loopback_cyc1000.qpf‎ ‎…opback/quartus/uart_loopback_cyc1000.qpf‎example/quartus/uart_loopback_cyc1000.qpf renamed to examples/loopback/quartus/uart_loopback_cyc1000.qpf
diff --git a/‎example/quartus/uart_loopback_cyc1000.qsf‎ ‎…opback/quartus/uart_loopback_cyc1000.qsf‎example/quartus/uart_loopback_cyc1000.qsf renamed to examples/loopback/quartus/uart_loopback_cyc1000.qsf
Lines changed: 7 additions & 7 deletions b/‎example/quartus/uart_loopback_cyc1000.qsf‎ ‎…opback/quartus/uart_loopback_cyc1000.qsf‎example/quartus/uart_loopback_cyc1000.qsf renamed to examples/loopback/quartus/uart_loopback_cyc1000.qsf
Lines changed: 7 additions & 7 deletions
diff --git a/‎example/quartus/uart_loopback_cyc1000.sdc‎ ‎…opback/quartus/uart_loopback_cyc1000.sdc‎example/quartus/uart_loopback_cyc1000.sdc renamed to examples/loopback/quartus/uart_loopback_cyc1000.sdc b/‎example/quartus/uart_loopback_cyc1000.sdc‎ ‎…opback/quartus/uart_loopback_cyc1000.sdc‎example/quartus/uart_loopback_cyc1000.sdc renamed to examples/loopback/quartus/uart_loopback_cyc1000.sdc
diff --git a/‎example/uart_loopback_cyc1000.vhd‎ ‎…mples/loopback/uart_loopback_cyc1000.vhd‎example/uart_loopback_cyc1000.vhd renamed to examples/loopback/uart_loopback_cyc1000.vhd b/‎example/uart_loopback_cyc1000.vhd‎ ‎…mples/loopback/uart_loopback_cyc1000.vhd‎example/uart_loopback_cyc1000.vhd renamed to examples/loopback/uart_loopback_cyc1000.vhd
@@ -12,13 +12,13 @@ set_global_assignment -name DEVICE 10CL025YU256C8G
 set_global_assignment -name TOP_LEVEL_ENTITY UART_LOOPBACK_CYC1000
 
 # PROJECT VHDL FILES
-set_global_assignment -name VHDL_FILE ../../rtl/comp/uart_clk_div.vhd
-set_global_assignment -name VHDL_FILE ../../rtl/comp/uart_parity.vhd
-set_global_assignment -name VHDL_FILE ../../rtl/comp/uart_debouncer.vhd
-set_global_assignment -name VHDL_FILE ../../rtl/comp/uart_tx.vhd
-set_global_assignment -name VHDL_FILE ../../rtl/comp/uart_rx.vhd
-set_global_assignment -name VHDL_FILE ../../rtl/uart.vhd
-set_global_assignment -name VHDL_FILE ../rst_sync.vhd
+set_global_assignment -name VHDL_FILE ../../../rtl/comp/uart_clk_div.vhd
+set_global_assignment -name VHDL_FILE ../../../rtl/comp/uart_parity.vhd
+set_global_assignment -name VHDL_FILE ../../../rtl/comp/uart_debouncer.vhd
+set_global_assignment -name VHDL_FILE ../../../rtl/comp/uart_tx.vhd
+set_global_assignment -name VHDL_FILE ../../../rtl/comp/uart_rx.vhd
+set_global_assignment -name VHDL_FILE ../../../rtl/uart.vhd
+set_global_assignment -name VHDL_FILE ../../common/rst_sync.vhd
 set_global_assignment -name VHDL_FILE ../uart_loopback_cyc1000.vhd
 
 # TIMING CONSTRAINTS