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Binary file modified mkapp/hal/HDZGOGGLE_RX.bin
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Binary file modified mkapp/hal/HDZGOGGLE_VA.bin
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2 changes: 1 addition & 1 deletion mkapp/hal/ver.txt
Original file line number Diff line number Diff line change
@@ -1 +1 @@
76-176
77-182
Binary file removed mkapp/ota_app/HDZGOGGLE_RX-76.bin
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Binary file removed mkapp/ota_app/HDZGOGGLE_VA-176.bin
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8 changes: 6 additions & 2 deletions src/core/app_state.c
Original file line number Diff line number Diff line change
Expand Up @@ -208,17 +208,21 @@ void app_switch_to_hdzero(bool is_default) {
Display_1080P30(CAM_MODE);
break;

case VR_1080P24:
Display_1080P24(CAM_MODE);
break;

default:
perror("switch_to_video CaM_MODE error");
}

channel_osd_mode = CHANNEL_SHOWTIME;

if (CAM_MODE == VR_1080P30)
if (CAM_MODE == VR_1080P30 || CAM_MODE == VR_1080P24)
lvgl_switch_to_1080p();
else
lvgl_switch_to_720p();
osd_fhd(CAM_MODE == VR_1080P30);
osd_fhd(CAM_MODE == VR_1080P30 || CAM_MODE == VR_1080P24);
osd_clear();
osd_show(true);
lv_timer_handler();
Expand Down
11 changes: 10 additions & 1 deletion src/core/dvr.c
Original file line number Diff line number Diff line change
Expand Up @@ -114,6 +114,11 @@ void dvr_update_vi_conf(video_resolution_t fmt) {
ini_putl("vi", "height", 1080, REC_CONF);
ini_putl("vi", "fps", 30, REC_CONF);
break;
case VR_1080P24:
ini_putl("vi", "width", 1920, REC_CONF);
ini_putl("vi", "height", 1080, REC_CONF);
ini_putl("vi", "fps", 50, REC_CONF);
break;
case VR_1080P50:
ini_putl("vi", "width", 1920, REC_CONF);
ini_putl("vi", "height", 1080, REC_CONF);
Expand Down Expand Up @@ -167,7 +172,7 @@ static void dvr_update_record_conf() {

if (g_source_info.source == SOURCE_HDZERO) {
LOGI("CAM_MODE=%d", CAM_MODE);
if (CAM_MODE == VR_1080P30) {
if (CAM_MODE == VR_1080P30 || CAM_MODE == VR_1080P24) {
ini_putl("venc", "width", 1920, REC_CONF);
ini_putl("venc", "height", 1080, REC_CONF);
} else {
Expand All @@ -179,6 +184,10 @@ static void dvr_update_record_conf() {
ini_putl("venc", "fps", 60, REC_CONF);
ini_putl("venc", "kbps", 34000, REC_CONF);
ini_putl("venc", "h265", 0, REC_CONF);
} else if (CAM_MODE == VR_1080P24) {
ini_putl("venc", "fps", 50, REC_CONF);
ini_putl("venc", "kbps", 34000, REC_CONF);
ini_putl("venc", "h265", 0, REC_CONF);
} else if (CAM_MODE == VR_540P90 || CAM_MODE == VR_540P90_CROP) { // 90fps
ini_putl("venc", "fps", 90, REC_CONF);
ini_putl("venc", "kbps", 34000, REC_CONF);
Expand Down
13 changes: 11 additions & 2 deletions src/core/msp_displayport.c
Original file line number Diff line number Diff line change
Expand Up @@ -180,7 +180,7 @@ void recive_one_frame(uint8_t *uart_buf, uint8_t uart_buf_len) {
break;

} // switch(rx_state)
} // while(RS_ready1())
} // while(RS_ready1())
}

void parser_rx(uint8_t function, uint8_t index, uint8_t *rx_buf) {
Expand Down Expand Up @@ -235,12 +235,21 @@ void camTypeDetect(uint8_t rData) {
last_cam = cur_cam;
cur_cam = VR_1080P30;
break;

case 0xBB:
last_cam = cur_cam;
cur_cam = VR_1080P24;
break;
}

if (cur_cam == last_cam)
CAM_MODE = cur_cam;
else if (cur_cam == VR_1080P30 || last_cam == VR_1080P30) {
// LOGI("Cam_mode changed:%d", cur_cam);
load_fc_osd_font(cur_cam == VR_1080P30);
} else if (cur_cam == VR_1080P24 || last_cam == VR_1080P24) {
// LOGI("Cam_mode changed:%d", cur_cam);
load_fc_osd_font(cur_cam == VR_1080P24);
}
}

Expand All @@ -256,7 +265,7 @@ void fcTypeDetect(uint8_t *rData) {
fc_variant[i] = fc_variant_rcv[i];

// LOGI("fc_variant changed:%s", fc_variant_rcv);
load_fc_osd_font(cur_cam == VR_1080P30);
load_fc_osd_font(cur_cam == VR_1080P30 || cur_cam == VR_1080P24);
}
}

Expand Down
20 changes: 11 additions & 9 deletions src/core/msp_displayport.h
Original file line number Diff line number Diff line change
Expand Up @@ -26,15 +26,17 @@ typedef enum {

typedef enum {
VR_720P50 = 0,
VR_720P60 = 1,
VR_720P30 = 2,
VR_540P90 = 3,
VR_540P60 = 4,
VR_960x720P60 = 5,
VR_540P90_CROP = 6,
VR_1080P30 = 7,
VR_1080P50 = 8,
VR_1080P60 = 9,
VR_720P60,
VR_720P30,
VR_540P90,
VR_540P60,
VR_960x720P60,
VR_540P90_CROP,
VR_1080P30,
VR_1080P24,
//
VR_1080P50,
VR_1080P60,
} video_resolution_t;

typedef enum {
Expand Down
85 changes: 67 additions & 18 deletions src/driver/hardware.c
Original file line number Diff line number Diff line change
Expand Up @@ -82,19 +82,19 @@ uint32_t pclk_phase_default[2][VIDEO_SOURCE_NUM] = {
},
{
// GOGGLE_VER_2
0x00000001,
0x00000004,
0x00000004, // VIDEO_SOURCE_MENU_UI
0x00000000, // VIDEO_SOURCE_HDZERO_IN_720P60_50
0x00000000, // VIDEO_SOURCE_HDZERO_IN_720P90
0x00000000, // VIDEO_SOURCE_HDZERO_IN_1080P30
0x00000000, // VIDEO_SOURCE_AV_IN
0x00000000, // VIDEO_SOURCE_HDMI_IN_1080P50
0x00000000, // VIDEO_SOURCE_HDMI_IN_1080P60
0x00000000, // VIDEO_SOURCE_HDMI_IN_1080POTHER
0x00000000, // VIDEO_SOURCE_HDMI_IN_720P50
0x00000000, // VIDEO_SOURCE_HDMI_IN_720P60
0x00000000, // VIDEO_SOURCE_HDMI_IN_720P100
0x00000000, // VIDEO_SOURCE_TP2825_EX, DO NOT USE
0x00000004, // VIDEO_SOURCE_HDZERO_IN_720P60_50
0x00000004, // VIDEO_SOURCE_HDZERO_IN_720P90
0x00000004, // VIDEO_SOURCE_HDZERO_IN_1080P30
0x00000004, // VIDEO_SOURCE_AV_IN
0x00000004, // VIDEO_SOURCE_HDMI_IN_1080P50
0x00000004, // VIDEO_SOURCE_HDMI_IN_1080P60
0x00000004, // VIDEO_SOURCE_HDMI_IN_1080POTHER
0x00000004, // VIDEO_SOURCE_HDMI_IN_720P50
0x00000004, // VIDEO_SOURCE_HDMI_IN_720P60
0x00000004, // VIDEO_SOURCE_HDMI_IN_720P100
0x00000004, // VIDEO_SOURCE_TP2825_EX, DO NOT USE
},
};

Expand Down Expand Up @@ -531,13 +531,21 @@ void csic_pclk_invert_set(uint8_t is_invert) {
void pclk_phase_set(video_source_t source) {
LOGI("pclk_phase_set %d", pclk_phase[source]);
// bit[0] hdmi in
IT66021_Set_Pclk((pclk_phase[source] >> 0) & 1);
if (source == VIDEO_SOURCE_HDMI_IN_1080P50 || source == VIDEO_SOURCE_HDMI_IN_1080P60 || source == VIDEO_SOURCE_HDMI_IN_1080POTHER) {
IT66021_Set_Pclk((pclk_phase[source] >> 0) & 1, 1);
} else {
IT66021_Set_Pclk((pclk_phase[source] >> 0) & 1, 2);
}

// bit[1] analog in
TP2825_Set_Pclk((pclk_phase[source] >> 1) & 1);

// bit[2] osd
vdpo_sync_ctrl_set((pclk_phase[source] >> 2) & 1, 0, 0);
if (source == VIDEO_SOURCE_AV_IN) {
vdpo_sync_ctrl_set((pclk_phase[source] >> 2) & 1, 1, 0);
} else {
vdpo_sync_ctrl_set((pclk_phase[source] >> 2) & 1, 0, 0);
}

// bit[3] dvr
csic_pclk_invert_set((pclk_phase[source] >> 3) & 1);
Expand Down Expand Up @@ -706,6 +714,37 @@ void Display_1080P30_t(int mode) {
system_exec("aww 0x06542018 0x00000044"); // disable horizontal chroma FIR filter.
}

void Display_1080P24_t(int mode) {
OLED_display(0);
I2C_Write(ADDR_FPGA, 0x8C, 0x00);

system_exec("dispw -s vdpo 1080p60");
g_hw_stat.vdpo_tmg = VDPO_TMG_1080P60;
vclk_phase_set(VIDEO_SOURCE_HDZERO_IN_1080P30, 0);
pclk_phase_set(VIDEO_SOURCE_HDZERO_IN_1080P30);

I2C_Write(ADDR_FPGA, 0x80, 0x84);
// I2C_Write(ADDR_FPGA, 0x84, 0x00); // close OSD

DM5680_SetFPS(mode);
MFPGA_Set1080P30();

if (GOGGLE_VER_2 == 0)
OLED_SetTMG(2);
else
OLED_SetTMG(0);

if (GOGGLE_VER_2)
I2C_Write(ADDR_FPGA, 0xa7, 0x00);

I2C_Write(ADDR_FPGA, 0x8C, 0x01);

g_hw_stat.source_mode = SOURCE_MODE_HDZERO;
Display_VO_SWITCH(1);
OLED_display(1);
system_exec("aww 0x06542018 0x00000044"); // disable horizontal chroma FIR filter.
}

void Display_720P60_50(int mode, uint8_t is_43) {
pthread_mutex_lock(&hardware_mutex);
Display_720P60_50_t(mode, is_43);
Expand All @@ -718,6 +757,12 @@ void Display_720P90(int mode) {
pthread_mutex_unlock(&hardware_mutex);
}

void Display_1080P24(int mode) {
pthread_mutex_lock(&hardware_mutex);
Display_1080P24_t(mode);
pthread_mutex_unlock(&hardware_mutex);
}

void Display_1080P30(int mode) {
pthread_mutex_lock(&hardware_mutex);
Display_1080P30_t(mode);
Expand Down Expand Up @@ -777,16 +822,18 @@ int HDZERO_detect() // return = 1: vtmg to V536 changed
break;
case VR_1080P30:
Display_1080P30_t(CAM_MODE);

break;
case VR_1080P24:
Display_1080P24_t(CAM_MODE);
break;
default:
LOGW("cam_mode =%d not suppored!!\n ", CAM_MODE);
break;
}

if (CAM_MODE == VR_1080P30)
if (CAM_MODE == VR_1080P30 || CAM_MODE == VR_1080P24)
fhd_req = 1;
else if (cam_mode_last == VR_1080P30)
else if (cam_mode_last == VR_1080P30 || cam_mode_last == VR_1080P24)
fhd_req = -1;
dvr_update_vi_conf(CAM_MODE);
system_script(REC_STOP_LIVE);
Expand Down Expand Up @@ -820,6 +867,7 @@ void AV_Mode_Switch_fpga(int is_pal) {
}
I2C_Write(ADDR_FPGA, 0x06, 0x0F);
system_exec("aww 0x06542018 0x00000044"); // disable horizontal chroma FIR filter.
vdpo_sync_ctrl_set((pclk_phase[VIDEO_SOURCE_AV_IN] >> 2) & 1, 1, 0);
}

void AV_Mode_Switch(int is_pal) {
Expand Down Expand Up @@ -932,8 +980,9 @@ int AV_in_detect() // return = 1: vtmg to V536 changed
g_hw_stat.av_pal_w = g_hw_stat.av_pal_w ? 0 : 1;

TP2825_Switch_Mode(g_hw_stat.av_pal_w);
if (GOGGLE_VER_2)
if (GOGGLE_VER_2) {
AV_Mode_Switch(g_hw_stat.av_pal_w);
}
// LOGI("Switch mode:%d", g_hw_stat.av_pal_w);

if (g_hw_stat.av_pal_w)
Expand Down
1 change: 1 addition & 0 deletions src/driver/hardware.h
Original file line number Diff line number Diff line change
Expand Up @@ -92,6 +92,7 @@ void Display_UI();
void Display_720P90(int mode);
void Display_720P60_50(int mode, uint8_t is_43);
void Display_1080P30(int mode);
void Display_1080P24(int mode);

void Display_Osd(bool enable);

Expand Down
7 changes: 4 additions & 3 deletions src/driver/it66021.c
Original file line number Diff line number Diff line change
Expand Up @@ -340,9 +340,10 @@ void IT66021_edid() {
I2C_L_Write(0x49, 0xc0, 0x04);
}

void IT66021_Set_Pclk(int inv) {
void IT66021_Set_Pclk(int inv, int dly) {
IT66021_Mask_WR(0, 0x0f, 0x03, 0x00);
if (inv)
I2C_L_Write(ADDR_IT66021, 0x50, 0xA2);
I2C_L_Write(ADDR_IT66021, 0x50, 0xA0 + dly);
else
I2C_L_Write(ADDR_IT66021, 0x50, 0xB2);
I2C_L_Write(ADDR_IT66021, 0x50, 0xB0 + dly);
}
2 changes: 1 addition & 1 deletion src/driver/it66021.h
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@ void IT66021_Set_CSMatrix(int cs);
int IT66021_Get_PCLKFREQ();
void IT66021_edid();

void IT66021_Set_Pclk(int inv);
void IT66021_Set_Pclk(int inv, int dly);

#ifdef __cplusplus
}
Expand Down