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feat: add shr/shl instructions [Maxime F] #18

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feat: add shr/shl instructions [Maxime F] #18

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3f10e9c
feat: add shr/shl instructions
iverly Feb 28, 2022
b903285
feat: add more test for shr/shl
iverly Feb 28, 2022
bec965e
docs(readme): add shr/shl instructions
iverly Feb 28, 2022
fbcd198
feat: add cli with args parser
iverly Feb 28, 2022
02fb619
fix(warn): allow dead_code on Instruction struct
iverly Feb 28, 2022
0b0f00e
feat(docs): add cargo docs
iverly Feb 28, 2022
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233 changes: 233 additions & 0 deletions Cargo.lock
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1 change: 1 addition & 0 deletions Cargo.toml
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Expand Up @@ -7,3 +7,4 @@ edition = "2018"
# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html

[dependencies]
clap = { version = "3.1.2", features = ["derive"] }
14 changes: 8 additions & 6 deletions README.md
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Expand Up @@ -49,9 +49,11 @@ The `do-core1` is a [load-store](https://en.wikipedia.org/wiki/Load%E2%80%93stor
architecture and supports the following instructions:


| Opcode | Instruction | Description |
|--------|--------------|------------------------------------------------------------------------------------------------|
| `0x00` | `LDW Rn, Rm` | **L**oa**D** **W**ord: Load the 32-bit value at the memory address contained in `Rm` into `Rn` |
| `0x01` | `STW Rn, Rm` | **ST**ore **W**ord: Store the 32-bit value from `Rn` into the memory address contained in `Rm` |
| `0x02` | `ADD Rn, Rm` | **ADD**: Add the value contained in `Rm` into `Rn` (`Rn = Rn + Rm`) |
| `0x03` | `XOR Rn, Rm` | e**X**clusive **OR**: Perform a bitwise exclusive OR between `Rn` and `Rm` (`Rn = Rn ^ Rm`) |
| Opcode | Instruction | Description |
|--------|-----------------|------------------------------------------------------------------------------------------------|
| `0x00` | `LDW Rn, Rm` | **L**oa**D** **W**ord: Load the 32-bit value at the memory address contained in `Rm` into `Rn` |
| `0x01` | `STW Rn, Rm` | **ST**ore **W**ord: Store the 32-bit value from `Rn` into the memory address contained in `Rm` |
| `0x02` | `ADD Rn, Rm` | **ADD**: Add the value contained in `Rm` into `Rn` (`Rn = Rn + Rm`) |
| `0x03` | `XOR Rn, Rm` | e**X**clusive **OR**: Perform a bitwise exclusive OR between `Rn` and `Rm` (`Rn = Rn ^ Rm`) |
| `0x04` | `SHR Rn, Count` | **SH**ift **R**ight: Perform a right shift in `Rn` on `Count` bits (`Rn = Rn >> Count`) |
| `0x05` | `SHL Rn, Count` | **SH**ift **L**eft: Perform a left shift in `Rn` on `Count` bits (`Rn = Rn << Count`) |
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