Skip to content

Commit 8ddff99

Browse files
stanleychuysgregkh
authored andcommitted
i3c: master: svc: Prevent incomplete IBI transaction
[ Upstream commit 3a36273 ] If no free IBI slot is available, svc_i3c_master_handle_ibi returns immediately. This causes the STOP condition to be missed because the EmitStop request is sent when the transfer is not complete. To resolve this, svc_i3c_master_handle_ibi must wait for the transfer to complete before returning. Fixes: dd3c528 ("i3c: master: svc: Add Silvaco I3C master driver") Signed-off-by: Stanley Chu <yschu@nuvoton.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://patch.msgid.link/20251027034715.708243-1-yschu@nuvoton.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
1 parent c704ccb commit 8ddff99

File tree

1 file changed

+14
-8
lines changed

1 file changed

+14
-8
lines changed

drivers/i3c/master/svc-i3c-master.c

Lines changed: 14 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -406,21 +406,27 @@ static int svc_i3c_master_handle_ibi(struct svc_i3c_master *master,
406406
int ret, val;
407407
u8 *buf;
408408

409-
slot = i3c_generic_ibi_get_free_slot(data->ibi_pool);
410-
if (!slot)
411-
return -ENOSPC;
412-
413-
slot->len = 0;
414-
buf = slot->data;
415-
409+
/*
410+
* Wait for transfer to complete before returning. Otherwise, the EmitStop
411+
* request might be sent when the transfer is not complete.
412+
*/
416413
ret = readl_relaxed_poll_timeout(master->regs + SVC_I3C_MSTATUS, val,
417414
SVC_I3C_MSTATUS_COMPLETE(val), 0, 1000);
418415
if (ret) {
419416
dev_err(master->dev, "Timeout when polling for COMPLETE\n");
420-
i3c_generic_ibi_recycle_slot(data->ibi_pool, slot);
421417
return ret;
422418
}
423419

420+
slot = i3c_generic_ibi_get_free_slot(data->ibi_pool);
421+
if (!slot) {
422+
dev_dbg(master->dev, "No free ibi slot, drop the data\n");
423+
writel(SVC_I3C_MDATACTRL_FLUSHRB, master->regs + SVC_I3C_MDATACTRL);
424+
return -ENOSPC;
425+
}
426+
427+
slot->len = 0;
428+
buf = slot->data;
429+
424430
while (SVC_I3C_MSTATUS_RXPEND(readl(master->regs + SVC_I3C_MSTATUS)) &&
425431
slot->len < SVC_I3C_FIFO_SIZE) {
426432
mdatactrl = readl(master->regs + SVC_I3C_MDATACTRL);

0 commit comments

Comments
 (0)