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619d782
initial version of multi-threading implementation
eyck Oct 7, 2025
06fe403
fixes wron quantum keeper
eyck Oct 7, 2025
218f652
utilizes mt quantum keeper
eyck Oct 11, 2025
f3d4a68
updates ISA and regenerates affected cores
EAlexJ Oct 27, 2025
1801efc
corrects vlenb behavior
EAlexJ Oct 27, 2025
504135f
adds cci param to allow dumping of post run stats
EAlexJ Oct 29, 2025
24b3597
enables disass logger for trap information output
EAlexJ Nov 5, 2025
dba9a81
adds instance based logger in riscv_hart_common and SC adapter
eyck Nov 6, 2025
beb2b8f
adds hello_world example for riscv-sim
eyck Nov 6, 2025
159fbef
Merge branch 'feature/instance_logger' into develop
eyck Nov 6, 2025
a6fa463
changes logging to use instance logger of SCC/common
eyck Nov 6, 2025
5c7bd9e
adapts to changes in SCC
eyck Nov 6, 2025
e64499d
implements #24
eyck Nov 7, 2025
c0737a2
fixes #25
eyck Nov 7, 2025
692a04a
cleans build dependencies
eyck Nov 14, 2025
c971b3c
updates version number and adds github ci action
eyck Nov 15, 2025
05f7051
removes out-dated cppstd levels
eyck Nov 15, 2025
b64add3
updates dbt-rise-core version
EAlexJ Nov 14, 2025
0dd45aa
changes memory_elems to take PLAT as template argument
EAlexJ Nov 15, 2025
3d0b54c
corrects typo
EAlexJ Nov 15, 2025
71e5ce5
updates gitignore to include more artifacts
EAlexJ Nov 15, 2025
49ebce2
removes unused expr
EAlexJ Nov 15, 2025
526e06a
changes memory_if for rd and wr to take space as an argument
EAlexJ Nov 15, 2025
cf39936
adds space behavior for mmu and pmp
EAlexJ Nov 15, 2025
6b75a4d
introduces mem space sizes to CORENAME.h, updates generated files
EAlexJ Nov 16, 2025
58384aa
adds a memory for each space to memory_with_htif
EAlexJ Nov 17, 2025
bd9125a
corrects pmp behavior wrt space
EAlexJ Nov 17, 2025
2ffcd78
corrects memory to actually work now
EAlexJ Nov 18, 2025
88614be
adds logginf for DMI access in core_complex
eyck Nov 21, 2025
a0ff129
fixes core2sc adapter to comply to changed read/write if
eyck Nov 21, 2025
5d10b36
Merge remote-tracking branch 'origin/develop' into feature/multi_thre…
eyck Nov 22, 2025
9823670
update dbt-rise-core and adjusts components accordingly
EAlexJ Nov 22, 2025
527098d
updates templates and regenerates cores
EAlexJ Nov 22, 2025
18d477f
adapts core2sc_adapter to use addr_t
EAlexJ Nov 22, 2025
0585ee6
corrects typo that inhibits building
EAlexJ Nov 22, 2025
19f3737
fixes zlib version conflict when using LLVM
eyck Nov 24, 2025
462d4ef
updates ci-compile.yml to include LLVM backend
eyck Nov 24, 2025
366f666
adds missign cmake option in ci-compile.yml
eyck Nov 24, 2025
d6cc81e
fixes cmake CLI syntax in ci-compile.yml
eyck Nov 24, 2025
14bf9bf
changes build type type to Release in ci-compile.yml
eyck Nov 24, 2025
d49d14f
updates used version of dbt-rise-core
eyck Nov 24, 2025
a1a9f5d
Merge remote-tracking branch 'origin/develop' into feature/multi_thre…
eyck Nov 25, 2025
a1bb6ec
remoces tcc leftovers, disables asmjit by default to decrease build time
EAlexJ Nov 26, 2025
855d24d
most minor change
EAlexJ Nov 26, 2025
17d799d
corrects memory_with_htif
EAlexJ Nov 26, 2025
fff0a75
unifies singe- and multi-threaded core_complex
eyck Nov 27, 2025
8a528fc
Merge branch 'feature/multi_threading' into develop
eyck Nov 27, 2025
dab4c69
refactors instrcution tracing/disass to be mt save
eyck Nov 28, 2025
39769b6
adds timed instruction recording
eyck Nov 29, 2025
f22ac29
fixes end of execution handling if cores shall be synced
eyck Nov 29, 2025
f616817
changes systemc interface wrt memory interaction functions to be inli…
EAlexJ Nov 24, 2025
264c48d
removes deprecated cores
EAlexJ Nov 25, 2025
5d40b34
changes core_complex_if and dependent files to use addr_t as const ref
EAlexJ Nov 25, 2025
87c29b3
adds memspace extension to hand off spaces into the systemc simulation
EAlexJ Nov 26, 2025
3a4d6c3
corrects sending of fetches via ibus
EAlexJ Nov 28, 2025
a9257ea
increases verbosity for memspace_dispatcher
EAlexJ Nov 30, 2025
d4659ec
corrects DMI wrt spaces
EAlexJ Nov 30, 2025
3678067
limits instantiated memory in ISS to 16GB
eyck Dec 5, 2025
3ff92f7
fixes initialization of RISC-V cores by calling reset early
eyck Dec 6, 2025
5b4d297
changes invocation of clint interrupts
eyck Dec 6, 2025
703bfc6
renames local_irq to clint_irq
eyck Dec 6, 2025
4990d15
simplifies clint_irq signal interface
eyck Dec 6, 2025
5dc8a9d
removes shadowing of the state
EAlexJ Dec 14, 2025
b4284ff
makes disass shorter
EAlexJ Dec 14, 2025
4b854a5
reworks mstatus handling,
EAlexJ Dec 14, 2025
6c83288
fixes CLINT interrupt handling
eyck Dec 14, 2025
7d93b4f
adds initiator id for bus accesses
eyck Dec 15, 2025
020f3b7
reworks mstatus handling,
EAlexJ Dec 14, 2025
b80ec1e
changes mstatus default value for 64 bits to implement UXL and SXL reads
EAlexJ Dec 16, 2025
c48722e
moves mask generation for mstatus into common,
EAlexJ Dec 16, 2025
cf5f081
fixes CLINT interrupt handling
eyck Dec 14, 2025
0f4bb16
adds initiator id for bus accesses
eyck Dec 15, 2025
605c236
changes mstatus default value for 64 bits to implement UXL and SXL reads
EAlexJ Dec 16, 2025
cedc491
moves mask generation for mstatus into common,
EAlexJ Dec 16, 2025
31cedb7
corrects typo
EAlexJ Dec 16, 2025
590cef2
Merge branch 'develop' into feature/better_mstatus
eyck Dec 16, 2025
84017d2
introduces bandaid fix for mstatus rst val
EAlexJ Dec 16, 2025
2ca7c80
caches conan dependencies in github action
EAlexJ Dec 16, 2025
e74b87f
Merge pull request #28 from Minres/feature/better_mstatus
eyck Dec 16, 2025
812d762
adds executing code in systemc context
eyck Dec 30, 2025
8b1f2df
adds conan caching to gh action
eyck Dec 30, 2025
7c59338
adds automatic removal of extensions in core_complex read/write
eyck Jan 2, 2026
209217e
fixes missing irq refactoring for tlm_signal use
eyck Jan 6, 2026
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2 changes: 2 additions & 0 deletions .envrc
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,8 @@ if [ $distro == "CentOS" ]; then
. /opt/rh/rh-python38/enable
elif [ $distro == "Rocky" ]; then
. /opt/rh/gcc-toolset-11/enable
elif [ $distro == "RockyLinux" ]; then
. /opt/rh/gcc-toolset-14/enable
fi
layout python3
[ -f .envrc.$USER ] && . .envrc.$USER
61 changes: 61 additions & 0 deletions .github/workflows/ci-compile.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,61 @@
name: CI C++ Std compliance

on:
push:
paths:
- '**.hpp'
- '**.cpp'
- '**.h'
- '**.c'
- '**CMakeLists.txt'
- '.github/workflows/**'
- 'conanfile.py'
pull_request:
paths:
- '**.hpp'
- '**.cpp'
- '**.h'
- '**.c'
- '**CMakeLists.txt'
- '.github/workflows/**'
- 'conanfile.py'

jobs:
build-and-test:
runs-on: ubuntu-latest
strategy:
matrix:
cpp_std: [17, 20]
steps:
- uses: actions/checkout@v4

- name: Update submodules
run: git submodule update --init --recursive

- name: Cache Conan
uses: actions/cache@v4
with:
path: ~/.conan2
key: conan-${{ runner.os }}-unit-cpp${{ matrix.cpp_std }}-${{ hashFiles('conanfile.py') }}

- name: Cache Conan
uses: actions/cache@v4
with:
path: ~/.conan2
key: conan-${{ runner.os }}-unit-cpp${{ matrix.cpp_std }}-${{ hashFiles('conanfile.py') }}

- name: Install dependencies
run: |
sudo apt-get update
sudo apt-get install -y g++ python3-pip cmake
pip3 install conan
cmake --version

- name: Configure
run: WITH_LLVM=1 cmake --preset Release -B build -DCMAKE_CXX_STANDARD=${{ matrix.cpp_std }} -DWITH_LLVM=ON

- name: Build
run: WITH_LLVM=1 cmake --build build -j

- name: Run smoke test
run: ./build/riscv-sim -h
1 change: 1 addition & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -38,3 +38,4 @@
build
contrib/instr/*_fast.yaml
contrib/instr/*_slow.yaml
.cache
15 changes: 11 additions & 4 deletions .vscode/settings.json
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,16 @@
"workbench.action.tasks.runTask"
],
"clangd.arguments": [
"--pretty",
"--background-index",
"--compile-commands-dir=${workspaceFolder}/build"
"--pretty",
"--background-index",
"--compile-commands-dir=${workspaceFolder}/build"
],
"cmake.copyCompileCommands": "${workspaceFolder}/build/compile_commands.json"
"cmake.copyCompileCommands": "${workspaceFolder}/build/compile_commands.json",
"editor.rulers": [
{
"column": 140,
"comment": "clang-format"
}
],
"editor.formatOnSave": true
}
69 changes: 40 additions & 29 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@ list(APPEND CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/cmake)
###############################################################################
#
###############################################################################
project(dbt-rise-riscv VERSION 2.0.0 LANGUAGES C CXX)
project(dbt-rise-riscv VERSION 2.1.0 LANGUAGES C CXX)

option(UPDATE_EXTERNAL_PROJECT "Whether to pull changes in external projects" ON)

Expand All @@ -20,7 +20,7 @@ if(NOT TARGET dbt-rise-core)
dbt_rise_core_git
GIT_REPOSITORY "https://github.com/Minres/DBT-RISE-Core.git"
#GIT_TAG "origin/develop"
GIT_TAG 0c7532f6
GIT_TAG cc0de2d
GIT_SHALLOW OFF
UPDATE_DISCONNECTED NOT ${UPDATE_EXTERNAL_PROJECT} # When enabled, this option causes the update step to be skipped.
)
Expand Down Expand Up @@ -49,7 +49,6 @@ add_subdirectory(softvector)
set(LIB_SOURCES
src/iss/plugin/instruction_count.cpp
src/iss/arch/rv32i.cpp
src/iss/arch/rv32imc.cpp
src/iss/arch/rv32imac.cpp
src/iss/arch/rv32gc.cpp
src/iss/arch/rv32gcv.cpp
Expand All @@ -76,12 +75,6 @@ if(TARGET yaml-cpp::yaml-cpp)
)
endif()

if(WITH_TCC)
list(APPEND LIB_SOURCES
src/vm/tcc/vm_tgc5c.cpp
)
endif()

if(WITH_LLVM)
list(APPEND LIB_SOURCES
src/vm/llvm/vm_tgc5c.cpp
Expand Down Expand Up @@ -120,28 +113,20 @@ if(IS_DIRECTORY "${PROJECT_SOURCE_DIR}/../dbt-rise-custom")
list(APPEND LIB_DEFINES CORE_${CORE})
endforeach()

message(STATUS "Core defines are ${LIB_DEFINES}")
#message(STATUS "Core defines are ${LIB_DEFINES}")

if(WITH_LLVM)
FILE(GLOB LLVM_GEN_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/../dbt-rise-custom/src/vm/llvm/vm_*.cpp)
list(APPEND LIB_SOURCES ${LLVM_GEN_SOURCES})
endif()

if(WITH_TCC)
FILE(GLOB TCC_GEN_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/../dbt-rise-custom/src/vm/tcc/vm_*.cpp)
list(APPEND LIB_SOURCES ${TCC_GEN_SOURCES})
endif()

if(WITH_ASMJIT)
FILE(GLOB TCC_GEN_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/../dbt-rise-custom/src/vm/asmjit/vm_*.cpp)
list(APPEND LIB_SOURCES ${TCC_GEN_SOURCES})
endif()
endif()
# Define the library
add_library(${PROJECT_NAME} SHARED ${LIB_SOURCES})
if(USE_SC_SIGNAL4IRQ)
target_compile_definitions(${PROJECT_NAME} PUBLIC SC_SIGNAL_IF)
endif()
if("${CMAKE_CXX_COMPILER_ID}" STREQUAL "GNU")
target_compile_options(${PROJECT_NAME} PRIVATE -Wno-shift-count-overflow)
elseif("${CMAKE_CXX_COMPILER_ID}" STREQUAL "MSVC")
Expand Down Expand Up @@ -238,11 +223,6 @@ if(BUILD_TESTING)
add_test(NAME riscv-sim-interp
COMMAND riscv-sim -f ${CMAKE_BINARY_DIR}/../../Firmwares/hello-world/hello --backend interp)

if(WITH_TCC)
add_test(NAME riscv-sim-tcc
COMMAND riscv-sim -f ${CMAKE_BINARY_DIR}/../../Firmwares/hello-world/hello --backend tcc)
endif()

if(WITH_LLVM)
add_test(NAME riscv-sim-llvm
COMMAND riscv-sim -f ${CMAKE_BINARY_DIR}/../../Firmwares/hello-world/hello --backend llvm)
Expand All @@ -259,6 +239,8 @@ endif()
###############################################################################
if(TARGET scc-sysc)
project(dbt-rise-riscv_sc VERSION 1.0.0)
set(USE_SC_SIGNAL4IRQ OFF CACHE BOOL "Enable the use of ssc_signals for interrupt delivery")

set(LIB_SOURCES
src/sysc/core_complex.cpp
src/sysc/register_cores.cpp
Expand All @@ -270,20 +252,44 @@ if(TARGET scc-sysc)
FILE(GLOB GEN_SC_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/../dbt-rise-custom/src/sysc/register_*.cpp)
list(APPEND LIB_SOURCES ${GEN_SC_SOURCES})
endif()
add_library(${PROJECT_NAME} ${LIB_SOURCES})
target_compile_definitions(${PROJECT_NAME} PUBLIC WITH_SYSTEMC)
target_link_libraries(${PROJECT_NAME} PUBLIC dbt-rise-riscv scc-sysc)
set(LIB_HEADERS ${CMAKE_CURRENT_SOURCE_DIR}/src/sysc/core_complex.h)

add_library(${PROJECT_NAME}_sig ${LIB_SOURCES})
target_compile_definitions(${PROJECT_NAME}_sig PUBLIC SC_SIGNAL_IF)
target_compile_definitions(${PROJECT_NAME}_sig PUBLIC WITH_SYSTEMC SC_SIGNAL_IF)
target_link_libraries(${PROJECT_NAME}_sig PUBLIC dbt-rise-riscv scc-sysc)

# if(WITH_LLVM)
# target_link_libraries(${PROJECT_NAME} PUBLIC ${llvm_libs})
# endif()
set(LIB_HEADERS ${CMAKE_CURRENT_SOURCE_DIR}/src/sysc/core_complex.h)
set_target_properties(${PROJECT_NAME} PROPERTIES
set_target_properties(${PROJECT_NAME}_sig PROPERTIES
VERSION ${PROJECT_VERSION}
FRAMEWORK FALSE
PUBLIC_HEADER "${LIB_HEADERS}" # specify the public headers
)
install(TARGETS ${PROJECT_NAME}_sig COMPONENT ${PROJECT_NAME}
EXPORT ${PROJECT_NAME}Targets # for downstream dependencies
ARCHIVE DESTINATION ${CMAKE_INSTALL_LIBDIR} # static lib
RUNTIME DESTINATION ${CMAKE_INSTALL_BINDIR} # binaries
LIBRARY DESTINATION ${CMAKE_INSTALL_LIBDIR} # shared lib
FRAMEWORK DESTINATION ${CMAKE_INSTALL_LIBDIR} # for mac
PUBLIC_HEADER DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/sysc # headers for mac (note the different component -> different package)
INCLUDES DESTINATION ${CMAKE_INSTALL_INCLUDEDIR} # headers
)

add_library(${PROJECT_NAME}_tlm ${LIB_SOURCES})
target_compile_definitions(${PROJECT_NAME}_tlm PUBLIC WITH_SYSTEMC)
target_link_libraries(${PROJECT_NAME}_tlm PUBLIC dbt-rise-riscv scc-sysc)

# if(WITH_LLVM)
# target_link_libraries(${PROJECT_NAME} PUBLIC ${llvm_libs})
# endif()
set_target_properties(${PROJECT_NAME}_tlm PROPERTIES
VERSION ${PROJECT_VERSION}
FRAMEWORK FALSE
PUBLIC_HEADER "${LIB_HEADERS}" # specify the public headers
)
install(TARGETS ${PROJECT_NAME} COMPONENT ${PROJECT_NAME}
install(TARGETS ${PROJECT_NAME}_tlm COMPONENT ${PROJECT_NAME}
EXPORT ${PROJECT_NAME}Targets # for downstream dependencies
ARCHIVE DESTINATION ${CMAKE_INSTALL_LIBDIR} # static lib
RUNTIME DESTINATION ${CMAKE_INSTALL_BINDIR} # binaries
Expand All @@ -292,6 +298,11 @@ if(TARGET scc-sysc)
PUBLIC_HEADER DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/sysc # headers for mac (note the different component -> different package)
INCLUDES DESTINATION ${CMAKE_INSTALL_INCLUDEDIR} # headers
)
if(USE_SC_SIGNAL4IRQ)
add_library(${PROJECT_NAME} ALIAS ${PROJECT_NAME}_sig)
else()
add_library(${PROJECT_NAME} ALIAS ${PROJECT_NAME}_tlm)
endif()
endif()

project(elfio-test)
Expand Down
4 changes: 2 additions & 2 deletions CMakePresets.json
Original file line number Diff line number Diff line change
Expand Up @@ -20,8 +20,8 @@
"CMAKE_INSTALL_PREFIX": "${sourceDir}/install/${presetName}",
"CMAKE_EXPORT_COMPILE_COMMANDS": "ON",
"CMAKE_PROJECT_TOP_LEVEL_INCLUDES": "contrib/cmake/conan_provider.cmake",
"CONAN_BUILD_PROFILE": "auto-cmake",
"WITH_TCC": "OFF"
"CONAN_HOST_PROFILE": "auto-cmake",
"CONAN_BUILD_PROFILE": "conan_host_profile"
}
},
{
Expand Down
3 changes: 1 addition & 2 deletions conanfile.py
Original file line number Diff line number Diff line change
Expand Up @@ -39,12 +39,11 @@ def requirements(self):
self.requires("fmt/8.0.1")
self.requires("spdlog/1.9.2")
self.requires("boost/1.85.0")
self.requires("abseil/20250127.0")
self.requires("elfio/3.11")
self.requires("lz4/1.9.3")
self.requires("yaml-cpp/0.7.0")
self.requires("jsoncpp/1.9.5")
self.requires("zlib/1.2.12")
self.requires("zlib/1.3.1")
self.requires("asmjit/cci.20240531")
if "WITH_LLVM" in os.environ:
self.requires("llvm-core/19.1.7")
Expand Down
1 change: 1 addition & 0 deletions contrib/fw/.gitignore
Original file line number Diff line number Diff line change
@@ -0,0 +1 @@
/bsp
5 changes: 5 additions & 0 deletions contrib/fw/hello-world/.gitignore
Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
/*.elf
/*.dis
/*.map
/*.a
/*.o
19 changes: 19 additions & 0 deletions contrib/fw/hello-world/Makefile
Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@

TARGET = hello
C_SRCS = $(wildcard *.c)
HEADERS = $(wildcard *.h)
CFLAGS += -Og -g

BOARD=iss
LINK_TARGET=link
RISCV_ARCH:=rv32imc
RISCV_ABI:=ilp32
#RISCV_ARCH:=rv64imc
#RISCV_ABI:=lp64
LDFLAGS := -g -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI)

compiler := $(shell which riscv64-unknown-elf-gcc)
TOOL_DIR=$(dir $(compiler))

BSP_BASE ?= ../bsp
include $(BSP_BASE)/env/common-gcc.mk
24 changes: 24 additions & 0 deletions contrib/fw/hello-world/hello.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,24 @@
#include <stdint.h>
#include <stdio.h>
#include <unistd.h>

#include <platform.h>
#include "encoding.h"

int factorial(int i){

volatile int result = 1;
for (int ii = 1; ii <= i; ii++) {
result = result * ii;
}
return result;

}

int main()
{
volatile int result = factorial (10);
printf("Factorial is %d\n", result);
printf("End of execution");
return 0;
}
Binary file added contrib/fw/hello-world/prebuilt/hello.elf
Binary file not shown.
2 changes: 1 addition & 1 deletion gen_input/ISA
17 changes: 16 additions & 1 deletion gen_input/templates/CORENAME.h.gtl
Original file line number Diff line number Diff line change
Expand Up @@ -46,6 +46,15 @@ def nativeSize(int size){
def getCString(def val){
return val.toString()+'ULL'
}
def overflowsafeSize(BigInteger val){
switch(val) {
//case 256: return "std::numeric_limits<uint8_t>::max()";
//case 65536: return "std::numeric_limits<uint16_t>::max()";
//case 4294967296: return "std::numeric_limits<uint32_t>::max()";
case 18446744073709551616: return "std::numeric_limits<uint64_t>::max()";
default: return val;
}
}
%>
#ifndef _${coreDef.name.toUpperCase()}_H_
#define _${coreDef.name.toUpperCase()}_H_
Expand Down Expand Up @@ -200,8 +209,14 @@ template <> struct traits<${coreDef.name.toLowerCase()}> {

enum sreg_flag_e { FLAGS };

enum mem_type_e { ${spaces.collect{it.name}.join(', ')}, IMEM = MEM };
enum mem_type_e { ${spaces.collect{it.name}.join(', ')}, IMEM = std::numeric_limits<decltype(phys_addr_t::space)>::max()};

static constexpr std::array<const uint64_t, ${spaces.size()}> mem_sizes{{
${spaces.collect{overflowsafeSize(it.value)}.join(',\n ')}
}};

static constexpr uint64_t max_mem_size = ${overflowsafeSize(spaces.collect{it.value}.max())};

enum class opcode_e {<%instructions.eachWithIndex{instr, index -> %>
${instr.instruction.name} = ${index},<%}%>
MAX_OPCODE
Expand Down
3 changes: 1 addition & 2 deletions gen_input/templates/asmjit/CORENAME.cpp.gtl
Original file line number Diff line number Diff line change
Expand Up @@ -365,9 +365,8 @@ template <typename ARCH>
continuation_e vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, jit_holder& jh) {
enum {TRAP_ID=1<<16};
code_word_t instr = 0;
phys_addr_t paddr(pc);
auto *const data = (uint8_t *)&instr;
auto res = this->core.read(paddr, 4, data);
auto res = this->core.read({address_type::LOGICAL, access_type::DEBUG_READ, arch::traits<ARCH>::IMEM, pc.val}, 4, data);
if (res != iss::Ok)
return ILLEGAL_FETCH;
if (instr == 0x0000006f || (instr&0xffff)==0xa001)
Expand Down
9 changes: 8 additions & 1 deletion gen_input/templates/interp/CORENAME.cpp.gtl
Original file line number Diff line number Diff line change
Expand Up @@ -295,7 +295,7 @@ private:
decoder instr_decoder;

iss::status fetch_ins(virt_addr_t pc, uint8_t * data){
if (this->core.read(iss::address_type::PHYSICAL, pc.access, pc.space, pc.val, 4, data) != iss::Ok)
if (this->core.read({iss::address_type::LOGICAL, pc.access, arch::traits<ARCH>::IMEM, pc.val}, 4, data) != iss::Ok)
return iss::Err;
return iss::Ok;
}
Expand Down Expand Up @@ -399,6 +399,13 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
break;
}// @suppress("No break at end of case")<%}%>
default: {
if(this->core.can_handle_unknown_instruction()) {
auto res = this->core.handle_unknown_instruction(pc.val, sizeof(instr), reinterpret_cast<uint8_t*>(&instr));
if(std::get<0>(res)) {
*NEXT_PC = std::get<1>(res);
break;
}
}
if(this->disass_enabled){
std::string mnemonic = "Illegal Instruction";
this->core.disass_output(pc.val, mnemonic);
Expand Down
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