Skip to content

Commit 32231dc

Browse files
Phuc Phamnhutnguyenkc
Phuc Pham
authored and
nhutnguyenkc
committed
hal: renesas: rz: adc: Add ADC driver support for RZV2H, RZV2N
Add ADC driver support for board RZ/V2H, V2N Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com> Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
1 parent 2525af2 commit 32231dc

File tree

4 files changed

+1478
-0
lines changed

4 files changed

+1478
-0
lines changed

‎drivers/rz/CMakeLists.txt‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,9 @@ zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_ADC
4545
zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_ADC_C
4646
fsp/src/${SOC_SERIES_PREFIX}/r_adc_c/r_adc_c.c)
4747

48+
zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_ADC_E
49+
fsp/src/${SOC_SERIES_PREFIX}/r_adc_e/r_adc_e.c)
50+
4851
zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_MHU
4952
fsp/src/${SOC_SERIES_PREFIX}/r_mhu_ns/r_mhu_ns.c)
5053

‎drivers/rz/fsp/inc/instances/rzv/r_adc_e.h‎

Lines changed: 288 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,288 @@
1+
/*
2+
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3+
*
4+
* SPDX-License-Identifier: BSD-3-Clause
5+
*/
6+
7+
#ifndef R_ADC_E_H
8+
#define R_ADC_E_H
9+
10+
/***********************************************************************************************************************
11+
* Includes
12+
**********************************************************************************************************************/
13+
#include <stdlib.h>
14+
15+
/* Fixed width integer support. */
16+
#include <stdint.h>
17+
18+
/* bool support */
19+
#include <stdbool.h>
20+
#include "bsp_api.h"
21+
#include "r_adc_e_cfg.h"
22+
#include "r_adc_api.h"
23+
24+
/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
25+
FSP_HEADER
26+
27+
/*******************************************************************************************************************//**
28+
* @addtogroup ADC_E
29+
* @{
30+
**********************************************************************************************************************/
31+
32+
/** For ADC Scan configuration adc_channel_cfg_t::scan_mask, adc_channel_cfg_t::scan_mask_group_b,
33+
* adc_channel_cfg_t::add_mask and adc_channel_cfg_t::sample_hold_mask.
34+
* Use bitwise OR to combine these masks for desired channels and sensors. */
35+
typedef enum e_adc_e_mask
36+
{
37+
ADC_E_MASK_OFF = (0U), ///< No channels selected
38+
ADC_E_MASK_CHANNEL_0 = (1U << 0U), ///< Channel 0 mask
39+
ADC_E_MASK_CHANNEL_1 = (1U << 1U), ///< Channel 1 mask
40+
ADC_E_MASK_CHANNEL_2 = (1U << 2U), ///< Channel 2 mask
41+
ADC_E_MASK_CHANNEL_3 = (1U << 3U), ///< Channel 3 mask
42+
ADC_E_MASK_CHANNEL_4 = (1U << 4U), ///< Channel 4 mask
43+
ADC_E_MASK_CHANNEL_5 = (1U << 5U), ///< Channel 5 mask
44+
ADC_E_MASK_CHANNEL_6 = (1U << 6U), ///< Channel 6 mask
45+
ADC_E_MASK_CHANNEL_7 = (1U << 7U), ///< Channel 7 mask
46+
} adc_e_mask_t;
47+
48+
/** ADC data sample addition and averaging options */
49+
typedef enum e_adc_e_add
50+
{
51+
ADC_E_ADD_OFF = 0, ///< Addition turned off for channels/sensors
52+
ADC_E_ADD_TWO = 1, ///< Add two samples
53+
ADC_E_ADD_THREE = 2, ///< Add three samples
54+
ADC_E_ADD_FOUR = 3, ///< Add four samples
55+
ADC_E_ADD_SIXTEEN = 5, ///< Add sixteen samples
56+
ADC_E_ADD_AVERAGE_TWO = 0x81, ///< Average two samples
57+
ADC_E_ADD_AVERAGE_FOUR = 0x83, ///< Average four samples
58+
} adc_e_add_t;
59+
60+
/** ADC clear after read definitions */
61+
typedef enum e_adc_e_clear
62+
{
63+
ADC_E_CLEAR_AFTER_READ_OFF = 0, ///< Clear after read off
64+
ADC_E_CLEAR_AFTER_READ_ON = 1 ///< Clear after read on
65+
} adc_e_clear_t;
66+
67+
/** ADC action for group A interrupts group B scan.
68+
* This enumeration is used to specify the priority between Group A and B in group mode. */
69+
typedef enum e_adc_e_group_a
70+
{
71+
ADC_E_GRPA_PRIORITY_OFF = 0, ///< Group A ignored and does not interrupt Group B and Group C
72+
ADC_E_GRPA_GRPB_GRPC_WAIT_TRIG = 1, ///< Group B and Group C restart at next trigger
73+
ADC_E_GRPA_GRPB_GRPC_TOP_RESTART_SCAN = 3, ///< Group B and Group C restart immediately and scans from the head of the channel
74+
ADC_E_GRPA_GRPB_GRPC_RESTART_SCAN = 0x4003, ///< Group B and Group C restart immediately and scans
75+
ADC_E_GRPA_GRPB_GRPC_TOP_CONT_SCAN = 0x8001, ///< Group B and Group C restart and scans continuously from the head of the channel
76+
ADC_E_GRPA_GRPB_GRPC_RESTART_TOP_CONT_SCAN = 0x8003, ///< Group B and Group C restart immediately and scans continuously from the head of the channel
77+
ADC_E_GRPA_GRPB_GRPC_RESTART_CONT_SCAN = 0xC003, ///< Group B and Group C restart immediately and scans continuously
78+
} adc_e_grpa_t;
79+
80+
/** Defines the registers settings for the ADC trigger. */
81+
typedef enum e_adc_e_active_trigger
82+
{
83+
ADC_E_ACTIVE_TRIGGER_EXTERNAL = (0x00U), ///< Input pin for the trigger
84+
ADC_E_ACTIVE_TRIGGER_GTADTRA0N = (0x01U), ///< Compare match with GPT00.GTADTRA
85+
ADC_E_ACTIVE_TRIGGER_GTADTRB0N = (0x02U), ///< Compare match with GPT00.GTADTRB
86+
ADC_E_ACTIVE_TRIGGER_GTADTRA1N = (0x03U), ///< Compare match with GPT01.GTADTRA
87+
ADC_E_ACTIVE_TRIGGER_GTADTRB1N = (0x04U), ///< Compare match with GPT01.GTADTRB
88+
ADC_E_ACTIVE_TRIGGER_GTADTRA2N = (0x05U), ///< Compare match with GPT02.GTADTRA
89+
ADC_E_ACTIVE_TRIGGER_GTADTRB2N = (0x06U), ///< Compare match with GPT02.GTADTRB
90+
ADC_E_ACTIVE_TRIGGER_GTADTRA3N = (0x07U), ///< Compare match with GPT03.GTADTRA
91+
ADC_E_ACTIVE_TRIGGER_GTADTRB3N = (0x08U), ///< Compare match with GPT03.GTADTRB
92+
ADC_E_ACTIVE_TRIGGER_GTADTRA4N = (0x09U), ///< Compare match with GPT04.GTADTRA
93+
ADC_E_ACTIVE_TRIGGER_GTADTRB4N = (0x0AU), ///< Compare match with GPT04.GTADTRB
94+
ADC_E_ACTIVE_TRIGGER_GTADTRA5N = (0x0BU), ///< Compare match with GPT05.GTADTRA
95+
ADC_E_ACTIVE_TRIGGER_GTADTRB5N = (0x0CU), ///< Compare match with GPT05.GTADTRB
96+
ADC_E_ACTIVE_TRIGGER_GTADTRA6N = (0x0DU), ///< Compare match with GPT06.GTADTRA
97+
ADC_E_ACTIVE_TRIGGER_GTADTRB6N = (0x0EU), ///< Compare match with GPT06.GTADTRB
98+
ADC_E_ACTIVE_TRIGGER_GTADTRA7N = (0x0FU), ///< Compare match with GPT07.GTADTRA
99+
ADC_E_ACTIVE_TRIGGER_GTADTRB7N = (0x10U), ///< Compare match with GPT07.GTADTRB
100+
ADC_E_ACTIVE_TRIGGER_GTADTRA8N = (0x11U), ///< Compare match with GPT08.GTADTRA
101+
ADC_E_ACTIVE_TRIGGER_GTADTRB8N = (0x12U), ///< Compare match with GPT08.GTADTRB
102+
ADC_E_ACTIVE_TRIGGER_GTADTRA9N = (0x13U), ///< Compare match with GPT09.GTADTRA
103+
ADC_E_ACTIVE_TRIGGER_GTADTRB9N = (0x14U), ///< Compare match with GPT09.GTADTRB
104+
ADC_E_ACTIVE_TRIGGER_GTADTRA10N = (0x15U), ///< Compare match with GPT10.GTADTRA
105+
ADC_E_ACTIVE_TRIGGER_GTADTRB10N = (0x16U), ///< Compare match with GPT10.GTADTRB
106+
ADC_E_ACTIVE_TRIGGER_GTADTRA11N = (0x17U), ///< Compare match with GPT11.GTADTRA
107+
ADC_E_ACTIVE_TRIGGER_GTADTRB11N = (0x18U), ///< Compare match with GPT11.GTADTRB
108+
ADC_E_ACTIVE_TRIGGER_GTADTRA12N = (0x19U), ///< Compare match with GPT12.GTADTRA
109+
ADC_E_ACTIVE_TRIGGER_GTADTRB12N = (0x1AU), ///< Compare match with GPT12.GTADTRB
110+
ADC_E_ACTIVE_TRIGGER_GTADTRA13N = (0x1BU), ///< Compare match with GPT13.GTADTRA
111+
ADC_E_ACTIVE_TRIGGER_GTADTRB13N = (0x1CU), ///< Compare match with GPT13.GTADTRB
112+
ADC_E_ACTIVE_TRIGGER_GTADTRA14N = (0x1DU), ///< Compare match with GPT14.GTADTRA
113+
ADC_E_ACTIVE_TRIGGER_GTADTRB14N = (0x1EU), ///< Compare match with GPT14.GTADTRB
114+
ADC_E_ACTIVE_TRIGGER_GTADTRA15N = (0x1FU), ///< Compare match with GPT15.GTADTRA
115+
ADC_E_ACTIVE_TRIGGER_GTADTRB15N = (0x20U), ///< Compare match with GPT15.GTADTRB
116+
ADC_E_ACTIVE_TRIGGER_GTADTRA0N_B0N = (0x21U), ///< Compare match with GPT00.GTADTRA or Compare match with GPT00.GTADTRB
117+
ADC_E_ACTIVE_TRIGGER_GTADTRA1N_B1N = (0x22U), ///< Compare match with GPT01.GTADTRA or Compare match with GPT01.GTADTRB
118+
ADC_E_ACTIVE_TRIGGER_GTADTRA2N_B2N = (0x23U), ///< Compare match with GPT02.GTADTRA or Compare match with GPT02.GTADTRB
119+
ADC_E_ACTIVE_TRIGGER_GTADTRA3N_B3N = (0x24U), ///< Compare match with GPT03.GTADTRA or Compare match with GPT03.GTADTRB
120+
ADC_E_ACTIVE_TRIGGER_GTADTRA4N_B4N = (0x25U), ///< Compare match with GPT04.GTADTRA or Compare match with GPT04.GTADTRB
121+
ADC_E_ACTIVE_TRIGGER_GTADTRA5N_B5N = (0x26U), ///< Compare match with GPT05.GTADTRA or Compare match with GPT05.GTADTRB
122+
ADC_E_ACTIVE_TRIGGER_GTADTRA6N_B6N = (0x27U), ///< Compare match with GPT06.GTADTRA or Compare match with GPT06.GTADTRB
123+
ADC_E_ACTIVE_TRIGGER_GTADTRA7N_B7N = (0x28U), ///< Compare match with GPT07.GTADTRA or Compare match with GPT07.GTADTRB
124+
ADC_E_ACTIVE_TRIGGER_GTADTRA8N_B8N = (0x29U), ///< Compare match with GPT08.GTADTRA or Compare match with GPT08.GTADTRB
125+
ADC_E_ACTIVE_TRIGGER_GTADTRA9N_B9N = (0x2AU), ///< Compare match with GPT09.GTADTRA or Compare match with GPT09.GTADTRB
126+
ADC_E_ACTIVE_TRIGGER_GTADTRA10N_B10N = (0x2BU), ///< Compare match with GPT10.GTADTRA or Compare match with GPT10.GTADTRB
127+
ADC_E_ACTIVE_TRIGGER_GTADTRA11N_B11N = (0x2CU), ///< Compare match with GPT11.GTADTRA or Compare match with GPT11.GTADTRB
128+
ADC_E_ACTIVE_TRIGGER_GTADTRA12N_B12N = (0x2DU), ///< Compare match with GPT12.GTADTRA or Compare match with GPT12.GTADTRB
129+
ADC_E_ACTIVE_TRIGGER_GTADTRA13N_B13N = (0x2EU), ///< Compare match with GPT13.GTADTRA or Compare match with GPT13.GTADTRB
130+
ADC_E_ACTIVE_TRIGGER_GTADTRA14N_B14N = (0x2FU), ///< Compare match with GPT14.GTADTRA or Compare match with GPT14.GTADTRB
131+
ADC_E_ACTIVE_TRIGGER_GTADTRA15N_B15N = (0x30U), ///< Compare match with GPT15.GTADTRA or Compare match with GPT15.GTADTRB
132+
ADC_E_ACTIVE_TRIGGER_ELCTRG0 = (0x31U), ///< ELC trigger
133+
ADC_E_ACTIVE_TRIGGER_DISABLED = (0x3FU), ///< Trigger source de-selection state
134+
} adc_e_active_trigger_t;
135+
136+
/** ADC double-trigger mode definitions */
137+
typedef enum e_adc_e_double_trigger
138+
{
139+
ADC_E_DOUBLE_TRIGGER_DISABLED = 0, ///< Double-triggering disabled
140+
ADC_E_DOUBLE_TRIGGER_ENABLED = 1, ///< Double-triggering enabled
141+
ADC_E_DOUBLE_TRIGGER_ENABLED_EXTENDED = 2, ///< Double-triggering enabled on both ADC ELC events
142+
} adc_e_double_trigger_t;
143+
144+
/** ADC comparison settings */
145+
typedef enum e_adc_e_compare_cfg
146+
{
147+
ADC_E_COMPARE_CFG_EVENT_OUTPUT_OR = 0,
148+
ADC_E_COMPARE_CFG_EVENT_OUTPUT_XOR = 1,
149+
ADC_E_COMPARE_CFG_EVENT_OUTPUT_AND = 2,
150+
ADC_E_COMPARE_CFG_A_ENABLE = R_ADC_E_ADCMPCR_CMPAE_Msk | R_ADC_E_ADCMPCR_CMPAIE_Msk,
151+
ADC_E_COMPARE_CFG_B_ENABLE = R_ADC_E_ADCMPCR_CMPBE_Msk | R_ADC_E_ADCMPCR_CMPBIE_Msk,
152+
ADC_E_COMPARE_CFG_WINDOW_ENABLE = R_ADC_E_ADCMPCR_WCMPE_Msk,
153+
} adc_e_compare_cfg_t;
154+
155+
/** ADC Window B channel */
156+
typedef enum e_adc_e_window_b_channel
157+
{
158+
ADC_E_WINDOW_B_CHANNEL_0 = 0,
159+
ADC_E_WINDOW_B_CHANNEL_1,
160+
ADC_E_WINDOW_B_CHANNEL_2,
161+
ADC_E_WINDOW_B_CHANNEL_3,
162+
ADC_E_WINDOW_B_CHANNEL_4,
163+
ADC_E_WINDOW_B_CHANNEL_5,
164+
ADC_E_WINDOW_B_CHANNEL_6,
165+
ADC_E_WINDOW_B_CHANNEL_7,
166+
ADC_E_WINDOW_B_CHANNEL_NONE = 63,
167+
} adc_e_window_b_channel_t;
168+
169+
/** ADC Window B comparison mode */
170+
typedef enum e_adc_e_window_b_mode
171+
{
172+
ADC_E_WINDOW_B_MODE_LESS_THAN_OR_OUTSIDE = 0,
173+
ADC_E_WINDOW_B_MODE_GREATER_THAN_OR_INSIDE = R_ADC_E_ADCMPBNSR_CMPLB_Msk,
174+
} adc_e_window_b_mode_t;
175+
176+
/** AD event link control definitions. */
177+
typedef enum e_adc_e_elc
178+
{
179+
ADC_E_ELC_GROUP_A_SCAN = 0x00U, ///< At the end of a group_a scan GCELC = 0b, ELCC[1:0] = 00b
180+
ADC_E_ELC_GROUP_B_SCAN = 0x01U, ///< At the end of a group_b scan GCELC = 0b, ELCC[1:0] = 01b
181+
ADC_E_ELC_GROUP_A_B_C_SCAN = 0x02U, ///< At the end of a group_abc scan GCELC = 0b, ELCC[1:0] = 1xb
182+
ADC_E_ELC_GROUP_C_SCAN = 0x04U, ///< At the end of a group_c scan GCELC = 1b, ELCC[1:0] = 00b
183+
} adc_e_elc_t;
184+
185+
/** Extended configuration structure for ADC. */
186+
typedef struct st_adc_e_extended_cfg
187+
{
188+
adc_e_add_t add_average_count; ///< Add or average samples
189+
adc_e_clear_t clearing; ///< Clear after read
190+
adc_trigger_t trigger_group_b; ///< Group B trigger source; valid only for group mode
191+
adc_e_double_trigger_t double_trigger_mode; ///< Double-trigger mode setting
192+
adc_e_active_trigger_t adc_start_trigger_a; ///< A/D Conversion Start Trigger Group A
193+
adc_e_active_trigger_t adc_start_trigger_b; ///< A/D Conversion Start Trigger Group B
194+
bool adc_start_trigger_c_enabled; ///< Set to true to enable Group C, false to disable Group C
195+
adc_e_active_trigger_t adc_start_trigger_c; ///< A/D Conversion Start Trigger Group C
196+
adc_e_elc_t adc_elc_ctrl; ///< A/D Event Link Control
197+
IRQn_Type window_a_irq; ///< IRQ number for Window Compare A interrupts
198+
IRQn_Type window_b_irq; ///< IRQ number for Window Compare B interrupts
199+
uint8_t window_a_ipl; ///< Priority for Window Compare A interrupts
200+
uint8_t window_b_ipl; ///< Priority for Window Compare B interrupts
201+
} adc_e_extended_cfg_t;
202+
203+
/** ADC Window Compare configuration */
204+
typedef struct st_adc_e_window_cfg
205+
{
206+
uint32_t compare_mask; ///< Channel mask to compare with Window A
207+
uint32_t compare_mode_mask; ///< Per-channel condition mask for Window A
208+
adc_e_compare_cfg_t compare_cfg; ///< Window Compare configuration
209+
uint16_t compare_ref_low; ///< Window A lower reference value
210+
uint16_t compare_ref_high; ///< Window A upper reference value
211+
uint16_t compare_b_ref_low; ///< Window B lower reference value
212+
uint16_t compare_b_ref_high; ///< Window A upper reference value
213+
adc_e_window_b_channel_t compare_b_channel; ///< Window B channel
214+
adc_e_window_b_mode_t compare_b_mode; ///< Window B condition setting
215+
} adc_e_window_cfg_t;
216+
217+
/** ADC channel(s) configuration */
218+
typedef struct st_adc_e_channel_cfg
219+
{
220+
uint32_t scan_mask; ///< Channels/bits: bit 0 is ch0; bit 15 is ch15.
221+
uint32_t scan_mask_group_b; ///< Valid for group modes.
222+
uint32_t scan_mask_group_c; ///< Valid for group modes.
223+
uint32_t add_mask; ///< Valid if add enabled in Open().
224+
adc_e_window_cfg_t * p_window_cfg; ///< Pointer to Window Compare configuration
225+
adc_e_grpa_t priority_group_a; ///< Valid for group modes.
226+
} adc_e_channel_cfg_t;
227+
228+
/***********************************************************************************************************************
229+
* Typedef definitions
230+
**********************************************************************************************************************/
231+
232+
/** ADC instance control block. DO NOT INITIALIZE. Initialized in @ref adc_api_t::open(). */
233+
typedef struct
234+
{
235+
R_ADC_E0_Type * p_reg; // Base register for this unit
236+
adc_cfg_t const * p_cfg;
237+
uint32_t opened; // Boolean to verify that the Unit has been initialized
238+
uint32_t initialized; // Initialized status of ADC
239+
uint32_t scan_mask; // Scan mask used for Normal scan.
240+
uint16_t scan_start_adcsr;
241+
uint16_t scan_start_adstrgr;
242+
uint8_t scan_start_adgctrgr;
243+
244+
void (* p_callback)(adc_callback_args_t *); // Pointer to callback that is called when an adc_event_t occurs.
245+
adc_callback_args_t * p_callback_memory; // Pointer to non-secure memory that can be used to pass arguments to a callback in non-secure memory.
246+
247+
/* Pointer to context to be passed into callback function */
248+
void const * p_context;
249+
} adc_e_instance_ctrl_t;
250+
251+
/**********************************************************************************************************************
252+
* Exported global variables
253+
**********************************************************************************************************************/
254+
255+
/** @cond INC_HEADER_DEFS_SEC */
256+
/** Interface Structure for user access */
257+
extern const adc_api_t g_adc_on_adc_e;
258+
259+
/** @endcond */
260+
261+
/***********************************************************************************************************************
262+
* Public APIs
263+
**********************************************************************************************************************/
264+
fsp_err_t R_ADC_E_Open(adc_ctrl_t * p_ctrl, adc_cfg_t const * const p_cfg);
265+
fsp_err_t R_ADC_E_ScanCfg(adc_ctrl_t * p_ctrl, void const * const p_channel_cfg);
266+
fsp_err_t R_ADC_E_InfoGet(adc_ctrl_t * p_ctrl, adc_info_t * p_adc_info);
267+
fsp_err_t R_ADC_E_ScanStart(adc_ctrl_t * p_ctrl);
268+
fsp_err_t R_ADC_E_ScanGroupStart(adc_ctrl_t * p_ctrl, adc_group_mask_t group_id);
269+
fsp_err_t R_ADC_E_ScanStop(adc_ctrl_t * p_ctrl);
270+
fsp_err_t R_ADC_E_StatusGet(adc_ctrl_t * p_ctrl, adc_status_t * p_status);
271+
fsp_err_t R_ADC_E_Read(adc_ctrl_t * p_ctrl, adc_channel_t const reg_id, uint16_t * const p_data);
272+
fsp_err_t R_ADC_E_Read32(adc_ctrl_t * p_ctrl, adc_channel_t const reg_id, uint32_t * const p_data);
273+
fsp_err_t R_ADC_E_Close(adc_ctrl_t * p_ctrl);
274+
fsp_err_t R_ADC_E_OffsetSet(adc_ctrl_t * const p_ctrl, adc_channel_t const reg_id, int32_t offset);
275+
fsp_err_t R_ADC_E_Calibrate(adc_ctrl_t * const p_ctrl, void const * p_extend);
276+
fsp_err_t R_ADC_E_CallbackSet(adc_ctrl_t * const p_api_ctrl,
277+
void ( * p_callback)(adc_callback_args_t *),
278+
void const * const p_context,
279+
adc_callback_args_t * const p_callback_memory);
280+
281+
/*******************************************************************************************************************//**
282+
* @} (end defgroup ADC_E)
283+
**********************************************************************************************************************/
284+
285+
/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
286+
FSP_FOOTER
287+
288+
#endif

0 commit comments

Comments
 (0)