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[AArch64] Remove nounwind readnone from some tests
llvm#171288 changed the tests to call into floating-point intrinsics instead of libcalls, and these attributes are already implied.
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‎llvm/test/CodeGen/AArch64/arm64-cvt-simd-fptoi.ll‎

Lines changed: 20 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1285,7 +1285,7 @@ define float @fcvtas_sh_simd(half %a) {
12851285
; CHECK: // %bb.0:
12861286
; CHECK-NEXT: fcvtas s0, h0
12871287
; CHECK-NEXT: ret
1288-
%r = call half @llvm.round.f16(half %a) nounwind readnone
1288+
%r = call half @llvm.round.f16(half %a)
12891289
%i = call i32 @llvm.fptosi.sat.i32.f16(half %r)
12901290
%bc = bitcast i32 %i to float
12911291
ret float %bc
@@ -1302,7 +1302,7 @@ define double @fcvtas_dh_simd(half %a) {
13021302
; CHECK: // %bb.0:
13031303
; CHECK-NEXT: fcvtas d0, h0
13041304
; CHECK-NEXT: ret
1305-
%r = call half @llvm.round.f16(half %a) nounwind readnone
1305+
%r = call half @llvm.round.f16(half %a)
13061306
%i = call i64 @llvm.fptosi.sat.i64.f16(half %r)
13071307
%bc = bitcast i64 %i to double
13081308
ret double %bc
@@ -1385,7 +1385,7 @@ define float @fcvtau_sh_simd(half %a) {
13851385
; CHECK: // %bb.0:
13861386
; CHECK-NEXT: fcvtau s0, h0
13871387
; CHECK-NEXT: ret
1388-
%r = call half @llvm.round.f16(half %a) nounwind readnone
1388+
%r = call half @llvm.round.f16(half %a)
13891389
%i = call i32 @llvm.fptoui.sat.i32.f16(half %r)
13901390
%bc = bitcast i32 %i to float
13911391
ret float %bc
@@ -1402,7 +1402,7 @@ define double @fcvtau_dh_simd(half %a) {
14021402
; CHECK: // %bb.0:
14031403
; CHECK-NEXT: fcvtau d0, h0
14041404
; CHECK-NEXT: ret
1405-
%r = call half @llvm.round.f16(half %a) nounwind readnone
1405+
%r = call half @llvm.round.f16(half %a)
14061406
%i = call i64 @llvm.fptoui.sat.i64.f16(half %r)
14071407
%bc = bitcast i64 %i to double
14081408
ret double %bc
@@ -1485,7 +1485,7 @@ define float @fcvtns_sh_simd(half %a) {
14851485
; CHECK: // %bb.0:
14861486
; CHECK-NEXT: fcvtns s0, h0
14871487
; CHECK-NEXT: ret
1488-
%r = call half @llvm.roundeven.f16(half %a) nounwind readnone
1488+
%r = call half @llvm.roundeven.f16(half %a)
14891489
%i = call i32 @llvm.fptosi.sat.i32.f16(half %r)
14901490
%bc = bitcast i32 %i to float
14911491
ret float %bc
@@ -1502,7 +1502,7 @@ define double @fcvtns_dh_simd(half %a) {
15021502
; CHECK: // %bb.0:
15031503
; CHECK-NEXT: fcvtns d0, h0
15041504
; CHECK-NEXT: ret
1505-
%r = call half @llvm.roundeven.f16(half %a) nounwind readnone
1505+
%r = call half @llvm.roundeven.f16(half %a)
15061506
%i = call i64 @llvm.fptosi.sat.i64.f16(half %r)
15071507
%bc = bitcast i64 %i to double
15081508
ret double %bc
@@ -1585,7 +1585,7 @@ define float @fcvtnu_sh_simd(half %a) {
15851585
; CHECK: // %bb.0:
15861586
; CHECK-NEXT: fcvtnu s0, h0
15871587
; CHECK-NEXT: ret
1588-
%r = call half @llvm.roundeven.f16(half %a) nounwind readnone
1588+
%r = call half @llvm.roundeven.f16(half %a)
15891589
%i = call i32 @llvm.fptoui.sat.i32.f16(half %r)
15901590
%bc = bitcast i32 %i to float
15911591
ret float %bc
@@ -1602,7 +1602,7 @@ define double @fcvtnu_dh_simd(half %a) {
16021602
; CHECK: // %bb.0:
16031603
; CHECK-NEXT: fcvtnu d0, h0
16041604
; CHECK-NEXT: ret
1605-
%r = call half @llvm.roundeven.f16(half %a) nounwind readnone
1605+
%r = call half @llvm.roundeven.f16(half %a)
16061606
%i = call i64 @llvm.fptoui.sat.i64.f16(half %r)
16071607
%bc = bitcast i64 %i to double
16081608
ret double %bc
@@ -1685,7 +1685,7 @@ define float @fcvtms_sh_simd(half %a) {
16851685
; CHECK: // %bb.0:
16861686
; CHECK-NEXT: fcvtms s0, h0
16871687
; CHECK-NEXT: ret
1688-
%r = call half @llvm.floor.f16(half %a) nounwind readnone
1688+
%r = call half @llvm.floor.f16(half %a)
16891689
%i = call i32 @llvm.fptosi.sat.i32.f16(half %r)
16901690
%bc = bitcast i32 %i to float
16911691
ret float %bc
@@ -1702,7 +1702,7 @@ define double @fcvtms_dh_simd(half %a) {
17021702
; CHECK: // %bb.0:
17031703
; CHECK-NEXT: fcvtms d0, h0
17041704
; CHECK-NEXT: ret
1705-
%r = call half @llvm.floor.f16(half %a) nounwind readnone
1705+
%r = call half @llvm.floor.f16(half %a)
17061706
%i = call i64 @llvm.fptosi.sat.i64.f16(half %r)
17071707
%bc = bitcast i64 %i to double
17081708
ret double %bc
@@ -1785,7 +1785,7 @@ define float @fcvtmu_sh_simd(half %a) {
17851785
; CHECK: // %bb.0:
17861786
; CHECK-NEXT: fcvtmu s0, h0
17871787
; CHECK-NEXT: ret
1788-
%r = call half @llvm.floor.f16(half %a) nounwind readnone
1788+
%r = call half @llvm.floor.f16(half %a)
17891789
%i = call i32 @llvm.fptoui.sat.i32.f16(half %r)
17901790
%bc = bitcast i32 %i to float
17911791
ret float %bc
@@ -1802,7 +1802,7 @@ define double @fcvtmu_dh_simd(half %a) {
18021802
; CHECK: // %bb.0:
18031803
; CHECK-NEXT: fcvtmu d0, h0
18041804
; CHECK-NEXT: ret
1805-
%r = call half @llvm.floor.f16(half %a) nounwind readnone
1805+
%r = call half @llvm.floor.f16(half %a)
18061806
%i = call i64 @llvm.fptoui.sat.i64.f16(half %r)
18071807
%bc = bitcast i64 %i to double
18081808
ret double %bc
@@ -1885,7 +1885,7 @@ define float @fcvtps_sh_simd(half %a) {
18851885
; CHECK: // %bb.0:
18861886
; CHECK-NEXT: fcvtps s0, h0
18871887
; CHECK-NEXT: ret
1888-
%r = call half @llvm.ceil.f16(half %a) nounwind readnone
1888+
%r = call half @llvm.ceil.f16(half %a)
18891889
%i = call i32 @llvm.fptosi.sat.i32.f16(half %r)
18901890
%bc = bitcast i32 %i to float
18911891
ret float %bc
@@ -1902,7 +1902,7 @@ define double @fcvtps_dh_simd(half %a) {
19021902
; CHECK: // %bb.0:
19031903
; CHECK-NEXT: fcvtps d0, h0
19041904
; CHECK-NEXT: ret
1905-
%r = call half @llvm.ceil.f16(half %a) nounwind readnone
1905+
%r = call half @llvm.ceil.f16(half %a)
19061906
%i = call i64 @llvm.fptosi.sat.i64.f16(half %r)
19071907
%bc = bitcast i64 %i to double
19081908
ret double %bc
@@ -1985,7 +1985,7 @@ define float @fcvtpu_sh_simd(half %a) {
19851985
; CHECK: // %bb.0:
19861986
; CHECK-NEXT: fcvtpu s0, h0
19871987
; CHECK-NEXT: ret
1988-
%r = call half @llvm.ceil.f16(half %a) nounwind readnone
1988+
%r = call half @llvm.ceil.f16(half %a)
19891989
%i = call i32 @llvm.fptoui.sat.i32.f16(half %r)
19901990
%bc = bitcast i32 %i to float
19911991
ret float %bc
@@ -2002,7 +2002,7 @@ define double @fcvtpu_dh_simd(half %a) {
20022002
; CHECK: // %bb.0:
20032003
; CHECK-NEXT: fcvtpu d0, h0
20042004
; CHECK-NEXT: ret
2005-
%r = call half @llvm.ceil.f16(half %a) nounwind readnone
2005+
%r = call half @llvm.ceil.f16(half %a)
20062006
%i = call i64 @llvm.fptoui.sat.i64.f16(half %r)
20072007
%bc = bitcast i64 %i to double
20082008
ret double %bc
@@ -2085,7 +2085,7 @@ define float @fcvtzs_sh_simd(half %a) {
20852085
; CHECK: // %bb.0:
20862086
; CHECK-NEXT: fcvtzs s0, h0
20872087
; CHECK-NEXT: ret
2088-
%r = call half @llvm.trunc.f16(half %a) nounwind readnone
2088+
%r = call half @llvm.trunc.f16(half %a)
20892089
%i = call i32 @llvm.fptosi.sat.i32.f16(half %r)
20902090
%bc = bitcast i32 %i to float
20912091
ret float %bc
@@ -2102,7 +2102,7 @@ define double @fcvtzs_dh_simd(half %a) {
21022102
; CHECK: // %bb.0:
21032103
; CHECK-NEXT: fcvtzs d0, h0
21042104
; CHECK-NEXT: ret
2105-
%r = call half @llvm.trunc.f16(half %a) nounwind readnone
2105+
%r = call half @llvm.trunc.f16(half %a)
21062106
%i = call i64 @llvm.fptosi.sat.i64.f16(half %r)
21072107
%bc = bitcast i64 %i to double
21082108
ret double %bc
@@ -2185,7 +2185,7 @@ define float @fcvtzu_sh_simd(half %a) {
21852185
; CHECK: // %bb.0:
21862186
; CHECK-NEXT: fcvtzu s0, h0
21872187
; CHECK-NEXT: ret
2188-
%r = call half @llvm.trunc.f16(half %a) nounwind readnone
2188+
%r = call half @llvm.trunc.f16(half %a)
21892189
%i = call i32 @llvm.fptoui.sat.i32.f16(half %r)
21902190
%bc = bitcast i32 %i to float
21912191
ret float %bc
@@ -2202,7 +2202,7 @@ define double @fcvtzu_dh_simd(half %a) {
22022202
; CHECK: // %bb.0:
22032203
; CHECK-NEXT: fcvtzu d0, h0
22042204
; CHECK-NEXT: ret
2205-
%r = call half @llvm.trunc.f16(half %a) nounwind readnone
2205+
%r = call half @llvm.trunc.f16(half %a)
22062206
%i = call i64 @llvm.fptoui.sat.i64.f16(half %r)
22072207
%bc = bitcast i64 %i to double
22082208
ret double %bc

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