@@ -113,31 +113,40 @@ impl MsiCapability {
113113 MultipleMessageSupport :: try_from ( reg. get_bits ( 4 ..7 ) as u8 ) . unwrap_or ( MultipleMessageSupport :: Int1 )
114114 }
115115
116- /// Set the memory address that will be written to when the interrupt fires.
116+ /// Set the memory address that will be written to when the interrupt fires, and the data that
117+ /// will be written to it.
118+ pub fn set_message_info ( & self , address : u64 , data : u32 , access : impl ConfigRegionAccess ) {
119+ unsafe {
120+ access. write ( self . address . address , self . address . offset + 0x04 , address. get_bits ( 0 ..32 ) as u32 ) ;
121+ if self . is_64bit {
122+ access. write ( self . address . address , self . address . offset + 0x08 , address. get_bits ( 32 ..64 ) as u32 ) ;
123+ }
124+ }
125+ let data_offset = if self . is_64bit { 0x0c } else { 0x08 } ;
126+ unsafe {
127+ access. write ( self . address . address , self . address . offset + data_offset, data) ;
128+ }
129+ }
130+
131+ /// Set the memory address that will be written to when the interrupt fires, and the data that
132+ /// will be written to it, specialised for the message format the LAPIC expects.
117133 ///
118134 /// # Arguments
119135 /// * `address` - Target Local APIC address (if not changed, can be calculated with `0xfee00000 | (processor << 12)`)
120136 /// * `vector` - Which interrupt vector should be triggered on LAPIC
121137 /// * `trigger_mode` - When interrupt should be triggered
122138 /// * `access` - PCI Configuration Space accessor
123- pub fn set_message_info (
139+ pub fn set_message_info_lapic (
124140 & self ,
125141 address : u64 ,
126142 vector : u8 ,
127143 trigger_mode : TriggerMode ,
128144 access : impl ConfigRegionAccess ,
129145 ) {
130- unsafe {
131- access. write ( self . address . address , self . address . offset + 0x04 , address. get_bits ( 0 ..32 ) as u32 ) ;
132- if self . is_64bit {
133- access. write ( self . address . address , self . address . offset + 0x08 , address. get_bits ( 32 ..64 ) as u32 ) ;
134- }
135- }
136- let data_offset = if self . is_64bit { 0x0c } else { 0x08 } ;
137- let mut data = unsafe { access. read ( self . address . address , self . address . offset + data_offset) } ;
146+ let mut data = 0 ;
138147 data. set_bits ( 0 ..8 , vector as u32 ) ;
139148 data. set_bits ( 14 ..16 , trigger_mode as u32 ) ;
140- unsafe { access . write ( self . address . address , self . address . offset + data_offset , data ) }
149+ self . set_message_info ( address, data , access ) ;
141150 }
142151
143152 /// Get interrupt mask
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