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Fix bit offsets in MSI capability
1 parent 2e5df07 commit 4012e71

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1 file changed

+14
-25
lines changed

1 file changed

+14
-25
lines changed

src/capability/msi.rs

Lines changed: 14 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -59,9 +59,8 @@ impl MsiCapability {
5959
address,
6060
per_vector_masking: control.get_bit(8),
6161
is_64bit: control.get_bit(7),
62-
multiple_message_capable:
63-
MultipleMessageSupport::try_from(control.get_bits(1..4) as u8)
64-
.unwrap_or(MultipleMessageSupport::Int1),
62+
multiple_message_capable: MultipleMessageSupport::try_from(control.get_bits(1..4) as u8)
63+
.unwrap_or(MultipleMessageSupport::Int1),
6564
}
6665
}
6766

@@ -83,39 +82,36 @@ impl MsiCapability {
8382
self.multiple_message_capable
8483
}
8584

85+
pub fn ctrl(&self, access: &impl ConfigRegionAccess) -> u32 {
86+
let reg = unsafe { access.read(self.address.address, self.address.offset) };
87+
reg
88+
}
89+
8690
/// Is MSI capability enabled?
8791
pub fn is_enabled(&self, access: &impl ConfigRegionAccess) -> bool {
8892
let reg = unsafe { access.read(self.address.address, self.address.offset) };
89-
reg.get_bit(0)
93+
reg.get_bit(16)
9094
}
9195

9296
/// Enable or disable MSI capability
9397
pub fn set_enabled(&self, enabled: bool, access: &impl ConfigRegionAccess) {
9498
let mut reg = unsafe { access.read(self.address.address, self.address.offset) };
95-
reg.set_bit(0, enabled);
99+
reg.set_bit(16, enabled);
96100
unsafe { access.write(self.address.address, self.address.offset, reg) };
97101
}
98102

99103
/// Set how many interrupts the device will use. If requested count is bigger than supported count,
100104
/// the second will be used.
101-
pub fn set_multiple_message_enable(
102-
&self,
103-
data: MultipleMessageSupport,
104-
access: &impl ConfigRegionAccess,
105-
) {
105+
pub fn set_multiple_message_enable(&self, data: MultipleMessageSupport, access: &impl ConfigRegionAccess) {
106106
let mut reg = unsafe { access.read(self.address.address, self.address.offset) };
107107
reg.set_bits(4..7, (data.min(self.multiple_message_capable)) as u32);
108108
unsafe { access.write(self.address.address, self.address.offset, reg) };
109109
}
110110

111111
/// Return how many interrupts the device is using
112-
pub fn get_multiple_message_enable(
113-
&self,
114-
access: &impl ConfigRegionAccess,
115-
) -> MultipleMessageSupport {
112+
pub fn get_multiple_message_enable(&self, access: &impl ConfigRegionAccess) -> MultipleMessageSupport {
116113
let reg = unsafe { access.read(self.address.address, self.address.offset) };
117-
MultipleMessageSupport::try_from(reg.get_bits(4..7) as u8)
118-
.unwrap_or(MultipleMessageSupport::Int1)
114+
MultipleMessageSupport::try_from(reg.get_bits(4..7) as u8).unwrap_or(MultipleMessageSupport::Int1)
119115
}
120116

121117
/// Set where the interrupts will be sent to
@@ -134,17 +130,10 @@ impl MsiCapability {
134130
) {
135131
unsafe { access.write(self.address.address, self.address.offset + 0x4, address) }
136132
let data_offset = if self.is_64bit { 0xC } else { 0x8 };
137-
let mut data =
138-
unsafe { access.read(self.address.address, self.address.offset + data_offset) };
133+
let mut data = unsafe { access.read(self.address.address, self.address.offset + data_offset) };
139134
data.set_bits(0..8, vector as u32);
140135
data.set_bits(14..16, trigger_mode as u32);
141-
unsafe {
142-
access.write(
143-
self.address.address,
144-
self.address.offset + data_offset,
145-
data,
146-
)
147-
}
136+
unsafe { access.write(self.address.address, self.address.offset + data_offset, data) }
148137
}
149138

150139
/// Get interrupt mask

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