Make abm, bmi1, bmi2, bswap and tbm functions const

Author: sayantn

crates/core_arch/src/x86/abm.rs

@@ -29,7 +29,8 @@ use stdarch_test::assert_instr;
 #[target_feature(enable = "lzcnt")]
 #[cfg_attr(test, assert_instr(lzcnt))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _lzcnt_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _lzcnt_u32(x: u32) -> u32 {
     x.leading_zeros()
 }
 
@@ -40,23 +41,25 @@ pub fn _lzcnt_u32(x: u32) -> u32 {
 #[target_feature(enable = "popcnt")]
 #[cfg_attr(test, assert_instr(popcnt))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _popcnt32(x: i32) -> i32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _popcnt32(x: i32) -> i32 {
     x.count_ones() as i32
 }
 
 #[cfg(test)]
 mod tests {
+    use crate::core_arch::assert_eq_const as assert_eq;
     use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
 
     #[simd_test(enable = "lzcnt")]
-    unsafe fn test_lzcnt_u32() {
+    const unsafe fn test_lzcnt_u32() {
         assert_eq!(_lzcnt_u32(0b0101_1010), 25);
     }
 
     #[simd_test(enable = "popcnt")]
-    unsafe fn test_popcnt32() {
+    const unsafe fn test_popcnt32() {
         assert_eq!(_popcnt32(0b0101_1010), 4);
     }
 }

crates/core_arch/src/x86/bmi1.rs

@@ -46,7 +46,8 @@ pub fn _bextr2_u32(a: u32, control: u32) -> u32 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(andn))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _andn_u32(a: u32, b: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _andn_u32(a: u32, b: u32) -> u32 {
     !a & b
 }
 
@@ -57,7 +58,8 @@ pub fn _andn_u32(a: u32, b: u32) -> u32 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(blsi))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _blsi_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _blsi_u32(x: u32) -> u32 {
     x & x.wrapping_neg()
 }
 
@@ -68,7 +70,8 @@ pub fn _blsi_u32(x: u32) -> u32 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(blsmsk))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _blsmsk_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _blsmsk_u32(x: u32) -> u32 {
     x ^ (x.wrapping_sub(1_u32))
 }
 
@@ -81,7 +84,8 @@ pub fn _blsmsk_u32(x: u32) -> u32 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(blsr))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _blsr_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _blsr_u32(x: u32) -> u32 {
     x & (x.wrapping_sub(1))
 }
 
@@ -94,7 +98,8 @@ pub fn _blsr_u32(x: u32) -> u32 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(tzcnt))]
 #[stable(feature = "simd_x86_updates", since = "1.82.0")]
-pub fn _tzcnt_u16(x: u16) -> u16 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _tzcnt_u16(x: u16) -> u16 {
     x.trailing_zeros() as u16
 }
 
@@ -107,7 +112,8 @@ pub fn _tzcnt_u16(x: u16) -> u16 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(tzcnt))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _tzcnt_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _tzcnt_u32(x: u32) -> u32 {
     x.trailing_zeros()
 }
 
@@ -120,7 +126,8 @@ pub fn _tzcnt_u32(x: u32) -> u32 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(tzcnt))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _mm_tzcnt_32(x: u32) -> i32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _mm_tzcnt_32(x: u32) -> i32 {
     x.trailing_zeros() as i32
 }
 
@@ -131,6 +138,7 @@ unsafe extern "C" {
 
 #[cfg(test)]
 mod tests {
+    use crate::core_arch::assert_eq_const as assert_eq;
     use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
@@ -142,7 +150,7 @@ mod tests {
     }
 
     #[simd_test(enable = "bmi1")]
-    unsafe fn test_andn_u32() {
+    const unsafe fn test_andn_u32() {
         assert_eq!(_andn_u32(0, 0), 0);
         assert_eq!(_andn_u32(0, 1), 1);
         assert_eq!(_andn_u32(1, 0), 0);
@@ -165,32 +173,32 @@ mod tests {
     }
 
     #[simd_test(enable = "bmi1")]
-    unsafe fn test_blsi_u32() {
+    const unsafe fn test_blsi_u32() {
         assert_eq!(_blsi_u32(0b1101_0000u32), 0b0001_0000u32);
     }
 
     #[simd_test(enable = "bmi1")]
-    unsafe fn test_blsmsk_u32() {
+    const unsafe fn test_blsmsk_u32() {
         let r = _blsmsk_u32(0b0011_0000u32);
         assert_eq!(r, 0b0001_1111u32);
     }
 
     #[simd_test(enable = "bmi1")]
-    unsafe fn test_blsr_u32() {
+    const unsafe fn test_blsr_u32() {
         // TODO: test the behavior when the input is `0`.
         let r = _blsr_u32(0b0011_0000u32);
         assert_eq!(r, 0b0010_0000u32);
     }
 
     #[simd_test(enable = "bmi1")]
-    unsafe fn test_tzcnt_u16() {
+    const unsafe fn test_tzcnt_u16() {
         assert_eq!(_tzcnt_u16(0b0000_0001u16), 0u16);
         assert_eq!(_tzcnt_u16(0b0000_0000u16), 16u16);
         assert_eq!(_tzcnt_u16(0b1001_0000u16), 4u16);
     }
 
     #[simd_test(enable = "bmi1")]
-    unsafe fn test_tzcnt_u32() {
+    const unsafe fn test_tzcnt_u32() {
         assert_eq!(_tzcnt_u32(0b0000_0001u32), 0u32);
         assert_eq!(_tzcnt_u32(0b0000_0000u32), 32u32);
         assert_eq!(_tzcnt_u32(0b1001_0000u32), 4u32);

crates/core_arch/src/x86/bmi2.rs

@@ -25,7 +25,8 @@ use stdarch_test::assert_instr;
 #[cfg_attr(all(test, target_arch = "x86"), assert_instr(mul))]
 #[target_feature(enable = "bmi2")]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _mulx_u32(a: u32, b: u32, hi: &mut u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _mulx_u32(a: u32, b: u32, hi: &mut u32) -> u32 {
     let result: u64 = (a as u64) * (b as u64);
     *hi = (result >> 32) as u32;
     result as u32
@@ -77,6 +78,7 @@ unsafe extern "C" {
 
 #[cfg(test)]
 mod tests {
+    use crate::core_arch::assert_eq_const as assert_eq;
     use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
@@ -117,7 +119,7 @@ mod tests {
     }
 
     #[simd_test(enable = "bmi2")]
-    unsafe fn test_mulx_u32() {
+    const unsafe fn test_mulx_u32() {
         let a: u32 = 4_294_967_200;
         let b: u32 = 2;
         let mut hi = 0;

crates/core_arch/src/x86/bswap.rs

@@ -10,16 +10,20 @@ use stdarch_test::assert_instr;
 #[inline]
 #[cfg_attr(test, assert_instr(bswap))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _bswap(x: i32) -> i32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _bswap(x: i32) -> i32 {
     x.swap_bytes()
 }
 
 #[cfg(test)]
 mod tests {
+    use crate::core_arch::assert_eq_const as assert_eq;
+    use stdarch_test::simd_test;
+
     use super::*;
 
-    #[test]
-    fn test_bswap() {
+    #[simd_test]
+    const fn test_bswap() {
         assert_eq!(_bswap(0x0EADBE0F), 0x0FBEAD0E);
         assert_eq!(_bswap(0x00000000), 0x00000000);
     }

crates/core_arch/src/x86/tbm.rs

@@ -42,7 +42,8 @@ pub fn _bextri_u32<const CONTROL: u32>(a: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blcfill))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _blcfill_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _blcfill_u32(x: u32) -> u32 {
     x & (x.wrapping_add(1))
 }
 
@@ -53,7 +54,8 @@ pub fn _blcfill_u32(x: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blci))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _blci_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _blci_u32(x: u32) -> u32 {
     x | !x.wrapping_add(1)
 }
 
@@ -64,7 +66,8 @@ pub fn _blci_u32(x: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blcic))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _blcic_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _blcic_u32(x: u32) -> u32 {
     !x & x.wrapping_add(1)
 }
 
@@ -76,7 +79,8 @@ pub fn _blcic_u32(x: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blcmsk))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _blcmsk_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _blcmsk_u32(x: u32) -> u32 {
     x ^ x.wrapping_add(1)
 }
 
@@ -87,7 +91,8 @@ pub fn _blcmsk_u32(x: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blcs))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _blcs_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _blcs_u32(x: u32) -> u32 {
     x | x.wrapping_add(1)
 }
 
@@ -98,7 +103,8 @@ pub fn _blcs_u32(x: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blsfill))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _blsfill_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _blsfill_u32(x: u32) -> u32 {
     x | x.wrapping_sub(1)
 }
 
@@ -109,7 +115,8 @@ pub fn _blsfill_u32(x: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blsic))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _blsic_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _blsic_u32(x: u32) -> u32 {
     !x | x.wrapping_sub(1)
 }
 
@@ -121,7 +128,8 @@ pub fn _blsic_u32(x: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(t1mskc))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _t1mskc_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _t1mskc_u32(x: u32) -> u32 {
     !x | x.wrapping_add(1)
 }
 
@@ -133,12 +141,14 @@ pub fn _t1mskc_u32(x: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(tzmsk))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _tzmsk_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
+pub const fn _tzmsk_u32(x: u32) -> u32 {
     !x & x.wrapping_sub(1)
 }
 
 #[cfg(test)]
 mod tests {
+    use crate::core_arch::assert_eq_const as assert_eq;
     use stdarch_test::simd_test;
 
     use crate::core_arch::x86::*;
@@ -149,13 +159,13 @@ mod tests {
     }
 
     #[simd_test(enable = "tbm")]
-    unsafe fn test_blcfill_u32() {
+    const unsafe fn test_blcfill_u32() {
         assert_eq!(_blcfill_u32(0b0101_0111u32), 0b0101_0000u32);
         assert_eq!(_blcfill_u32(0b1111_1111u32), 0u32);
     }
 
     #[simd_test(enable = "tbm")]
-    unsafe fn test_blci_u32() {
+    const unsafe fn test_blci_u32() {
         assert_eq!(
             _blci_u32(0b0101_0000u32),
             0b1111_1111_1111_1111_1111_1111_1111_1110u32
@@ -167,25 +177,25 @@ mod tests {
     }
 
     #[simd_test(enable = "tbm")]
-    unsafe fn test_blcic_u32() {
+    const unsafe fn test_blcic_u32() {
         assert_eq!(_blcic_u32(0b0101_0001u32), 0b0000_0010u32);
         assert_eq!(_blcic_u32(0b1111_1111u32), 0b1_0000_0000u32);
     }
 
     #[simd_test(enable = "tbm")]
-    unsafe fn test_blcmsk_u32() {
+    const unsafe fn test_blcmsk_u32() {
         assert_eq!(_blcmsk_u32(0b0101_0001u32), 0b0000_0011u32);
         assert_eq!(_blcmsk_u32(0b1111_1111u32), 0b1_1111_1111u32);
     }
 
     #[simd_test(enable = "tbm")]
-    unsafe fn test_blcs_u32() {
+    const unsafe fn test_blcs_u32() {
         assert_eq!(_blcs_u32(0b0101_0001u32), 0b0101_0011u32);
         assert_eq!(_blcs_u32(0b1111_1111u32), 0b1_1111_1111u32);
     }
 
     #[simd_test(enable = "tbm")]
-    unsafe fn test_blsfill_u32() {
+    const unsafe fn test_blsfill_u32() {
         assert_eq!(_blsfill_u32(0b0101_0100u32), 0b0101_0111u32);
         assert_eq!(
             _blsfill_u32(0u32),
@@ -194,7 +204,7 @@ mod tests {
     }
 
     #[simd_test(enable = "tbm")]
-    unsafe fn test_blsic_u32() {
+    const unsafe fn test_blsic_u32() {
         assert_eq!(
             _blsic_u32(0b0101_0100u32),
             0b1111_1111_1111_1111_1111_1111_1111_1011u32
@@ -206,7 +216,7 @@ mod tests {
     }
 
     #[simd_test(enable = "tbm")]
-    unsafe fn test_t1mskc_u32() {
+    const unsafe fn test_t1mskc_u32() {
         assert_eq!(
             _t1mskc_u32(0b0101_0111u32),
             0b1111_1111_1111_1111_1111_1111_1111_1000u32
@@ -218,7 +228,7 @@ mod tests {
     }
 
     #[simd_test(enable = "tbm")]
-    unsafe fn test_tzmsk_u32() {
+    const unsafe fn test_tzmsk_u32() {
         assert_eq!(_tzmsk_u32(0b0101_1000u32), 0b0000_0111u32);
         assert_eq!(_tzmsk_u32(0b0101_1001u32), 0b0000_0000u32);
     }