Implement dscratch0 and dscratch1 CSRs for RISC-V

Author: KushalMeghani1644

riscv/src/register.rs

@@ -131,4 +131,9 @@ mod tests;
 
 // TODO: Debug Mode Registers
 pub mod dcsr;
+<<<<<<< HEAD
 pub mod dpc;
+=======
+pub mod dscratch0;
+pub mod dscratch1;
+>>>>>>> d078ccf (Implement dscratch0 and dscratch1 CSRs for RISC-V)

riscv/src/register/dscratch0.rs

@@ -0,0 +1,25 @@
+//! dscratch0
+
+read_write_csr! {
+    /// Debug scratch register 0
+    Dscratch0: 0x7b2,
+    mask: usize::MAX,
+}
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+
+    #[test]
+    fn test_dscratch0_mask() {
+        let reg = Dscratch0::from_bits(usize::MAX);
+        assert_eq!(reg.bits(), usize::MAX);
+        assert_eq!(Dscratch0::BITMASK, usize::MAX);
+    }
+
+    #[test]
+    fn test_dscratch0_roundtrip() {
+        let reg = Dscratch0::from_bits(0xDEAD_BEEFusize);
+        assert_eq!(reg.bits(), 0xDEAD_BEEFusize);
+    }
+}

riscv/src/register/dscratch1.rs

@@ -0,0 +1,25 @@
+//! dscratch1
+
+read_write_csr! {
+    /// Debug scratch register 1
+    Dscratch1: 0x7b3,
+    mask: usize::MAX,
+}
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+
+    #[test]
+    fn test_dscratch1_mask() {
+        let reg = Dscratch1::from_bits(usize::MAX);
+        assert_eq!(reg.bits(), usize::MAX);
+        assert_eq!(Dscratch1::BITMASK, usize::MAX);
+    }
+
+    #[test]
+    fn test_dscratch1_roundtrip() {
+        let reg = Dscratch1::from_bits(0xDEAD_BEEFusize);
+        assert_eq!(reg.bits(), 0xDEAD_BEEFusize);
+    }
+}