I2S: use DMA

Author: rleh

src/modm/platform/i2s/stm32/i2s_master.hpp.in

@@ -1,11 +1,6 @@
 /*
- * Copyright (c) 2009-2011, Fabian Greif
- * Copyright (c) 2010, Martin Rosekeit
- * Copyright (c) 2011-2017, Niklas Hauser
- * Copyright (c) 2012, Georgi Grinshpun
- * Copyright (c) 2013, Kevin Läufer
- * Copyright (c) 2014, Sascha Schade
  * Copyright (C) 2021, Marton Ledneczki
+ * Copyright (C) 2021, Raphael Lehmann
  *
  * This file is part of the modm project.
  *
@@ -36,16 +31,26 @@ namespace platform
  *
  * TODO: say something about the nature of implementation
  *
- * @author	Marton Ledneczki
+ * @tparam DmaChannelTX DMA channel for sending
+ *
+ * @author	Marton Ledneczki, Raphael Lehmann
  * @ingroup	modm_platform_i2s modm_platform_i2s_{{id}}
  */
+template <class DmaChannelTx>
 class I2sMaster{{ id }} : public modm::I2sMaster
 {
+	struct Dma {
+		using TxChannel = typename DmaChannelTx::template RequestMapping<
+				Peripheral::Spi{{ id }}, DmaBase::Signal::Tx>::Channel;
+		static constexpr DmaBase::Request TxRequest = DmaChannelTx::template RequestMapping<
+				Peripheral::Spi{{ id }}, DmaBase::Signal::Tx>::Request;
+	};
+
 public:
 	using Hal = I2sHal{{ id }};
 
 
-	template< template<Peripheral _> class... Signals >
+	template< class... Signals >
 	static void
 	connect()
 	{
@@ -65,7 +70,7 @@ public:
 
 	template< class SystemClock, frequency_t samplerate, percent_t tolerance=pct(0.019) >
 	static inline void
-	initialize()
+	initialize(DmaBase::Priority dmaPriority = DmaBase::Priority::High)
 	{
 		constexpr float prescaler = static_cast<float>(SystemClock::I2sPll) / (samplerate*16*2*8);
 		constexpr uint8_t i2s_div = static_cast<uint8_t>(prescaler/2);
@@ -77,9 +82,68 @@ public:
 						"I2S{{ id }}: Exceeding specified tolerance, when determining prescelar.");
 		Hal::initialize(odd_factor ? Hal::OddFactor::Enabled : Hal::OddFactor::Disabled,
 						i2s_div);
+
+		Dma::TxChannel::configure(
+			DmaBase::DataTransferDirection::MemoryToPeripheral, DmaBase::MemoryDataSize::Bit16,
+			DmaBase::PeripheralDataSize::Bit16, DmaBase::MemoryIncrementMode::Increment,
+			DmaBase::PeripheralIncrementMode::Fixed, dmaPriority,
+			DmaBase::CircularMode::Disabled, DmaBase::DoubleBufferMode::Enabled);
+		Dma::TxChannel::setPeripheralAddress(SPI{{ id }}_BASE + 0x0c);
+		Dma::TxChannel::setTransferErrorIrqHandler(handleDmaTransferError);
+		Dma::TxChannel::enableInterruptVector();
+		Dma::TxChannel::enableInterrupt(DmaBase::InterruptEnable::TransferError |
+				DmaBase::InterruptEnable::TransferComplete);
+		Dma::TxChannel::template setPeripheralRequest<Dma::TxRequest>();
+	}
+
+	static inline void
+	setTxBufferAddresses(uintptr_t first_address, uintptr_t second_address, std::size_t length)
+	{
+		Dma::TxChannel::setMemoryAddress(first_address);
+		Dma::TxChannel::setMemoryAddress2(second_address);
+		Dma::TxChannel::setDataLength(length);
+	}
+
+	static inline void
+	setTxBufferAddress1(uintptr_t first_address)
+	{
+		Dma::TxChannel::setMemoryAddress(first_address);
+	}
+
+	static inline void
+	setTxBufferAddress2( uintptr_t second_address)
+	{
+		Dma::TxChannel::setMemoryAddress2(second_address);
+	}
+
+	static inline bool
+	isBuffer1Active()
+	{
+		return Dma::TxChannel::isPrimaryBufferActive();
+	}
+
+	static inline void
+	start()
+	{
+		Dma::TxChannel::start();
+	}
+
+	static inline void
+	stop()
+	{
+		Dma::TxChannel::stop();
 	}
 
 	// end documentation inherited
+
+private:
+	static void handleDmaTransferError()
+	{
+		Dma::TxChannel::stop();
+		dmaError = true;
+	}
+
+	static inline bool dmaError { false };
 };
 
 } // namespace platform