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DE_0xx_Cramps: add default quartus compilable project (cap sensor version)
Signed-off-by: Michael Brown <producer@holotronic.dk>
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config argument: DE0_Nano_SoC_Cramps
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size of encoded message: 117 0x75
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text format representation:
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---
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build_sha: "26d422a"
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fpga_part_number: "altera socfpga"
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connector {
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name: "GPIO0.P0"
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pins: 24
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}
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connector {
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name: "GPIO0.P1"
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pins: 24
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}
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connector {
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name: "GPIO0.P2"
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pins: 24
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}
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num_leds: 0
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board_name: "Terasic DE0-Nano"
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comment: "$BUILD_URL unset"
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---
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wire format length=117 0a0732366434323261120e616c7465726120736f63667067611a0f0a084750494f302e503015180000001a0f0a084750494f302e503115180000001a0f0a084750494f302e5032151800000025000000002a1054657261736963204445302d4e616e6f3210244255494c445f55524c20756e736574
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size of MIF struct including cookie and length field: 125
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%
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WIDTH=32;
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DEPTH=32;
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ADDRESS_RADIX=HEX;
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DATA_RADIX=HEX;
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CONTENT BEGIN
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0000 : feedbabe;
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0001 : 00000075;
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0002 : 3632070a;
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0003 : 32323464;
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0004 : 610e1261;
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0005 : 7265746c;
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0006 : 6f732061;
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0007 : 67706663;
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0008 : 0a0f1a61;
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0009 : 49504708;
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000a : 502e304f;
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000b : 00181530;
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000c : 0f1a0000;
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000d : 5047080a;
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000e : 2e304f49;
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000f : 18153150;
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0010 : 1a000000;
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0011 : 47080a0f;
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0012 : 304f4950;
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0013 : 1532502e;
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0014 : 00000018;
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0015 : 00000025;
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0016 : 54102a00;
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0017 : 73617265;
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0018 : 44206369;
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0019 : 4e2d3045;
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001a : 326f6e61;
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001b : 55422410;
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001c : 5f444c49;
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001d : 204c5255;
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001e : 65736e75;
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001f : 00000074;
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END;
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set_global_assignment -name VHDL_FILE ../../hm2/config/DE0_Nano_SoC_Cramps/hostmot3_cfg.vhd
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set_global_assignment -name SYSTEMVERILOG_FILE ../../hm2/config/DE0_Nano_SoC_Cramps/atlas_3x24_cap.sv
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# I/O Daughterboard adaptor specific:
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set_global_assignment -name VHDL_FILE ../../hm2/config/DE0_Nano_SoC_Cramps/PIN_3x24_cap.vhd -library pin

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