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Commit e030de9

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fix MIPI DSI driver
1 parent d7f69f3 commit e030de9

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4 files changed

+20
-16
lines changed

4 files changed

+20
-16
lines changed

ext_mod/lcd_bus/esp32_include/dsi_bus.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
2323
#include "esp_lcd_panel_io.h"
2424
#include "esp_lcd_mipi_dsi.h"
2525

26+
#define DPI_PANEL_MAX_FB_NUM 3 // from "mipi_dsi_priv.h"
2627

2728
typedef struct _mp_lcd_dsi_bus_obj_t {
2829
mp_obj_base_t base;

ext_mod/lcd_bus/esp32_src/dsi_bus.c

Lines changed: 14 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@
99
#include "mphalport.h"
1010
#include "py/obj.h"
1111
#include "py/runtime.h"
12+
#include "py/binary.h"
1213

1314
// stdlib includes
1415
#include <string.h>
@@ -23,9 +24,7 @@
2324
#include "esp_lcd_panel_io.h"
2425
#include "esp_heap_caps.h"
2526
#include "hal/lcd_types.h"
26-
#include "esp_lcd_mipi_dsi.h"
2727

28-
2928
typedef struct {
3029
esp_lcd_panel_t base; // Base class of generic lcd panel
3130
esp_lcd_dsi_bus_handle_t bus; // DSI bus handle
@@ -39,7 +38,7 @@
3938
mp_lcd_err_t dsi_del(mp_obj_t obj);
4039
mp_lcd_err_t dsi_init(mp_obj_t obj, uint16_t width, uint16_t height, uint8_t bpp, uint32_t buffer_size, bool rgb565_byte_swap, uint8_t cmd_bits, uint8_t param_bits);
4140
mp_lcd_err_t dsi_get_lane_count(mp_obj_t obj, uint8_t *lane_count);
42-
mp_lcd_err_t dsi_tx_color(mp_obj_t obj, int lcd_cmd, void *color, size_t color_size, int x_start, int y_start, int x_end, int y_end, , uint8_t rotation, bool last_update);
41+
mp_lcd_err_t dsi_tx_color(mp_obj_t obj, int lcd_cmd, void *color, size_t color_size, int x_start, int y_start, int x_end, int y_end, uint8_t rotation, bool last_update);
4342
mp_obj_t dsi_allocate_framebuffer(mp_obj_t obj, uint32_t size, uint32_t caps);
4443
mp_obj_t dsi_free_framebuffer(mp_obj_t obj, mp_obj_t buf);
4544

@@ -67,7 +66,8 @@
6766
enum {
6867
ARG_bus_id,
6968
ARG_data_lanes,
70-
ARG_freq,
69+
ARG_lane_bitrate,
70+
ARG_clock_freq,
7171
ARG_virtual_channel,
7272
ARG_hsync_front_porch,
7373
ARG_hsync_back_porch,
@@ -80,7 +80,8 @@
8080
const mp_arg_t make_new_args[] = {
8181
{ MP_QSTR_bus_id, MP_ARG_INT | MP_ARG_KW_ONLY | MP_ARG_REQUIRED },
8282
{ MP_QSTR_data_lanes, MP_ARG_INT | MP_ARG_KW_ONLY | MP_ARG_REQUIRED },
83-
{ MP_QSTR_freq, MP_ARG_INT | MP_ARG_KW_ONLY | MP_ARG_REQUIRED },
83+
{ MP_QSTR_lane_bitrate, MP_ARG_INT | MP_ARG_KW_ONLY | MP_ARG_REQUIRED },
84+
{ MP_QSTR_clock_freq, MP_ARG_INT | MP_ARG_KW_ONLY | MP_ARG_REQUIRED },
8485
{ MP_QSTR_virtual_channel, MP_ARG_INT | MP_ARG_KW_ONLY | MP_ARG_REQUIRED },
8586
{ MP_QSTR_hsync_front_porch, MP_ARG_INT | MP_ARG_KW_ONLY, { .u_int = 0 } },
8687
{ MP_QSTR_hsync_back_porch, MP_ARG_INT | MP_ARG_KW_ONLY, { .u_int = 0 } },
@@ -108,15 +109,15 @@
108109

109110
self->bus_config.bus_id = (int)args[ARG_bus_id].u_int;
110111
self->bus_config.num_data_lanes = (uint8_t)args[ARG_data_lanes].u_int;
111-
self->bus_config.lane_bit_rate_mbps = (uint32_t)args[ARG_freq].u_int;
112+
self->bus_config.lane_bit_rate_mbps = (uint32_t)args[ARG_lane_bitrate].u_int;
112113
self->bus_config.phy_clk_src = MIPI_DSI_PHY_CLK_SRC_DEFAULT;
113114

114115
self->panel_io_config.virtual_channel = (uint8_t)args[ARG_virtual_channel].u_int;
115116

116117
self->panel_config.virtual_channel = (uint8_t)args[ARG_virtual_channel].u_int;
117118
self->panel_config.dpi_clk_src = MIPI_DSI_DPI_CLK_SRC_DEFAULT;
118119

119-
self->panel_config.dpi_clock_freq_mhz = (uint32_t)args[ARG_freq].u_int;
120+
self->panel_config.dpi_clock_freq_mhz = (uint8_t)args[ARG_clock_freq].u_int;
120121

121122
self->panel_config.video_timing.hsync_back_porch = (uint32_t)args[ARG_hsync_back_porch].u_int;
122123
self->panel_config.video_timing.hsync_pulse_width = (uint32_t)args[ARG_hsync_pulse_width].u_int;
@@ -127,8 +128,6 @@
127128

128129
self->panel_config.num_fbs = 0;
129130

130-
self->bus_config.pclk_hz = (uint32_t)args[ARG_freq].u_int;
131-
132131
LCD_DEBUG_PRINT("bus_id=%d\n", self->bus_config.bus_id)
133132
LCD_DEBUG_PRINT("num_data_lanes=%d\n", self->bus_config.num_data_lanes)
134133
LCD_DEBUG_PRINT("lane_bit_rate_mbps=%d\n",self->bus_config.lane_bit_rate_mbps)
@@ -142,7 +141,6 @@
142141
LCD_DEBUG_PRINT("vsync_front_porch=%d\n", self->panel_config.video_timing.vsync_front_porch)
143142
LCD_DEBUG_PRINT("vsync_back_porch=%d\n", self->panel_config.video_timing.vsync_back_porch)
144143
LCD_DEBUG_PRINT("vsync_pulse_width=%d\n", self->panel_config.video_timing.vsync_pulse_width)
145-
LCD_DEBUG_PRINT("pclk_hz[10]=%d\n", self->bus_config.pclk_hz)
146144

147145
self->panel_io_handle.get_lane_count = &dsi_get_lane_count;
148146
self->panel_io_handle.del = &dsi_del;
@@ -175,7 +173,7 @@
175173
self->rgb565_byte_swap = false;
176174
break;
177175
default:
178-
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("unsopported bits per pixel.(%d)"), bpp);
176+
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("unsupported bits per pixel.(%d)"), bpp);
179177
return LCD_ERR_INVALID_ARG;
180178
}
181179

@@ -198,10 +196,10 @@
198196
return ret;
199197
}
200198

201-
ret = esp_lcd_new_panel_io_dsi(self->bus_handle, &self->panel_io_config, &self->panel_io_handle.panel_io);
199+
ret = esp_lcd_new_panel_io_dbi(self->bus_handle, &self->panel_io_config, &self->panel_io_handle.panel_io);
202200

203201
if (ret != 0) {
204-
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("%d(esp_lcd_new_panel_io_dsi)"), ret);
202+
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("%d(esp_lcd_new_panel_io_dbi)"), ret);
205203
return ret;
206204
}
207205

@@ -261,7 +259,7 @@
261259
}
262260

263261

264-
mp_lcd_err_t ret = esp_lcd_panel_io_del(self->panel_io_handle.panel_io);
262+
ret = esp_lcd_panel_io_del(self->panel_io_handle.panel_io);
265263
if (ret != 0) {
266264
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("%d(esp_lcd_panel_io_del)"), ret);
267265
return ret;
@@ -329,9 +327,9 @@
329327
#endif
330328
}
331329

332-
void *buf = heap_caps_calloc(1, 1, MALLOC_CAP_INTERNAL);
330+
void *buf = heap_caps_calloc(1, size, caps);
333331

334-
mp_obj_array_t *view = MP_OBJ_TO_PTR(mp_obj_new_memoryview(BYTEARRAY_TYPECODE, 1, buf));
332+
mp_obj_array_t *view = MP_OBJ_TO_PTR(mp_obj_new_memoryview(BYTEARRAY_TYPECODE, size, buf));
335333
view->typecode |= 0x80; // used to indicate writable buffer
336334

337335
uint32_t available = (uint32_t)heap_caps_get_largest_free_block(caps);

ext_mod/lcd_bus/micropython.cmake

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@ if(ESP_PLATFORM)
1313
set(LCD_SOURCES
1414
${CMAKE_CURRENT_LIST_DIR}/modlcd_bus.c
1515
${CMAKE_CURRENT_LIST_DIR}/lcd_types.c
16+
${CMAKE_CURRENT_LIST_DIR}/esp32_src/dsi_bus.c
1617
${CMAKE_CURRENT_LIST_DIR}/esp32_src/i2c_bus.c
1718
${CMAKE_CURRENT_LIST_DIR}/esp32_src/spi_bus.c
1819
${CMAKE_CURRENT_LIST_DIR}/esp32_src/i80_bus.c

ext_mod/lcd_bus/modlcd_bus.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66
#include "i2c_bus.h"
77
#include "i80_bus.h"
88
#include "rgb_bus.h"
9+
#include "dsi_bus.h"
910

1011
#ifdef MP_PORT_UNIX
1112
#include "sdl_bus.h"
@@ -291,6 +292,9 @@ static const mp_rom_map_elem_t mp_module_lcd_bus_globals_table[] = {
291292
{ MP_ROM_QSTR(MP_QSTR_SPIBus), MP_ROM_PTR(&mp_lcd_spi_bus_type) },
292293
{ MP_ROM_QSTR(MP_QSTR_I2CBus), MP_ROM_PTR(&mp_lcd_i2c_bus_type) },
293294
{ MP_ROM_QSTR(MP_QSTR_I80Bus), MP_ROM_PTR(&mp_lcd_i80_bus_type) },
295+
#ifdef SOC_MIPI_DSI_SUPPORTED
296+
{ MP_ROM_QSTR(MP_QSTR_DSIBus), MP_ROM_PTR(&mp_lcd_dsi_bus_type) },
297+
#endif
294298
{ MP_ROM_QSTR(MP_QSTR__pump_main_thread), MP_ROM_PTR(&mp_lcd_bus__pump_main_thread_obj) },
295299

296300
#ifdef MP_PORT_UNIX

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