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[RISCV] Use GPRNoX0 instead of AVL for Xsfmm pseudos. NFC (#170726)
AVL allows immediates, but we don't have an equivalent of vsetivli for XSfmm.
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llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td

Lines changed: 12 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -278,7 +278,7 @@ let Uses = [FRM], mayRaiseFPException = true in {
278278
} // DecoderNamespace = "XSfvector"
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280280
class VPseudoSF_VTileLoad
281-
: RISCVVPseudo<(outs), (ins GPR:$rs2, GPR:$rs1, AVL:$atn, ixlenimm:$sew,
281+
: RISCVVPseudo<(outs), (ins GPR:$rs2, GPR:$rs1, GPRNoX0:$atn, ixlenimm:$sew,
282282
ixlenimm:$twiden)> {
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let mayLoad = 1;
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let mayStore = 0;
@@ -289,7 +289,7 @@ class VPseudoSF_VTileLoad
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}
290290

291291
class VPseudoSF_VTileStore
292-
: RISCVVPseudo<(outs), (ins GPR:$rs2, GPR:$rs1, AVL:$atn, ixlenimm:$sew,
292+
: RISCVVPseudo<(outs), (ins GPR:$rs2, GPR:$rs1, GPRNoX0:$atn, ixlenimm:$sew,
293293
ixlenimm:$twiden)> {
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let mayLoad = 0;
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let mayStore = 1;
@@ -300,7 +300,7 @@ class VPseudoSF_VTileStore
300300
}
301301

302302
class VPseudoSF_VTileMove_V_T
303-
: RISCVVPseudo<(outs VRM8:$vd), (ins GPR:$rs1, AVL:$atn, ixlenimm:$sew,
303+
: RISCVVPseudo<(outs VRM8:$vd), (ins GPR:$rs1, GPRNoX0:$atn, ixlenimm:$sew,
304304
ixlenimm:$twiden)> {
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let mayLoad = 0;
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let mayStore = 0;
@@ -311,7 +311,7 @@ class VPseudoSF_VTileMove_V_T
311311
}
312312

313313
class VPseudoSF_VTileMove_T_V
314-
: RISCVVPseudo<(outs), (ins GPR:$rs1, VRM8:$vs2, AVL:$atn, ixlenimm:$sew,
314+
: RISCVVPseudo<(outs), (ins GPR:$rs1, VRM8:$vs2, GPRNoX0:$atn, ixlenimm:$sew,
315315
ixlenimm:$twiden)> {
316316
let mayLoad = 0;
317317
let mayStore = 0;
@@ -323,8 +323,9 @@ class VPseudoSF_VTileMove_T_V
323323

324324
class VPseudoSF_MatMul<RegisterClass mtd_class>
325325
: RISCVVPseudo<(outs),
326-
(ins mtd_class:$rd, VRM8:$vs2, VRM8:$vs1, AVL:$atm, AVL:$atn,
327-
AVL:$atk, ixlenimm:$sew, ixlenimm:$twiden)> {
326+
(ins mtd_class:$rd, VRM8:$vs2, VRM8:$vs1, GPRNoX0:$atm,
327+
GPRNoX0:$atn, GPRNoX0:$atk, ixlenimm:$sew,
328+
ixlenimm:$twiden)> {
328329
let mayLoad = 0;
329330
let mayStore = 0;
330331
let HasTmOp = 1;
@@ -338,7 +339,7 @@ class VPseudoSF_MatMul<RegisterClass mtd_class>
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class VPseudoSF_MatMul_FRM<RegisterClass mtd_class>
339340
: RISCVVPseudo<(outs),
340341
(ins mtd_class:$rd, VRM8:$vs2, VRM8:$vs1, ixlenimm:$frm,
341-
AVL:$atm, AVL:$atn, AVL:$atk, ixlenimm:$sew,
342+
GPRNoX0:$atm, GPRNoX0:$atn, GPRNoX0:$atk, ixlenimm:$sew,
342343
ixlenimm:$twiden), []> {
343344
let mayLoad = 0;
344345
let mayStore = 0;
@@ -413,7 +414,7 @@ let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in {
413414
let HasVLOp = 1, HasTmOp = 1, HasTWidenOp = 1, HasSEWOp = 1 in
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def PseudoSF_VTZERO_T
415416
: RISCVVPseudo<(outs),
416-
(ins TR:$rd, AVL:$atm, AVL:$atn, ixlenimm:$sew,
417+
(ins TR:$rd, GPRNoX0:$atm, GPRNoX0:$atn, ixlenimm:$sew,
417418
ixlenimm:$twiden)>;
418419
def PseudoSF_VTDISCARD : RISCVVPseudo<(outs), (ins), []>;
419420
}
@@ -424,7 +425,7 @@ class VPatXSfmmTileStore<string intrinsic_name,
424425
Pat<(!cast<Intrinsic>(intrinsic_name)
425426
(XLenVT GPR:$rs2),
426427
(XLenVT GPR:$rs1),
427-
(XLenVT AVL:$tn)),
428+
(XLenVT GPRNoX0:$tn)),
428429
(!cast<Instruction>(inst_name)
429430
(XLenVT GPR:$rs2),
430431
(XLenVT GPR:$rs1),
@@ -437,7 +438,7 @@ class VPatXSfmmTileMove_T_V<string intrinsic_name,
437438
Pat<(!cast<Intrinsic>(intrinsic_name)
438439
(XLenVT GPR:$rs1),
439440
(reg_type VRM8:$vs2),
440-
(XLenVT AVL:$atn)),
441+
(XLenVT GPRNoX0:$atn)),
441442
(!cast<Instruction>(inst_name)
442443
(XLenVT GPR:$rs1),
443444
(reg_type VRM8:$vs2),
@@ -449,7 +450,7 @@ class VPatXSfmmTileMove_V_T<string intrinsic_name,
449450
int log2sew> :
450451
Pat<(result_type (!cast<Intrinsic>(intrinsic_name)
451452
(XLenVT GPR:$rs1),
452-
(XLenVT AVL:$atn))),
453+
(XLenVT GPRNoX0:$atn))),
453454
(!cast<Instruction>(inst_name)
454455
(XLenVT GPR:$rs1),
455456
GPR:$atn, log2sew, 1)>;

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