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[CIR][AMDGPU] Add lowering for amdgcn ds swizzle builtin (#2052)
This PR adds support for lowering of _builtin_amdgcn_div_swizzle* amdgpu builtins to clangIR. Followed similar lowering from reference clang->llvmir in clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp.
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clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp

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@@ -128,6 +128,8 @@ mlir::Value CIRGenFunction::emitAMDGPUBuiltinExpr(unsigned builtinId,
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return result;
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}
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case AMDGPU::BI__builtin_amdgcn_ds_swizzle:
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return emitBuiltinWithOneOverloadedType<2>(expr, "amdgcn.ds.swizzle")
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.getScalarVal();
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case AMDGPU::BI__builtin_amdgcn_mov_dpp8:
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case AMDGPU::BI__builtin_amdgcn_mov_dpp:
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case AMDGPU::BI__builtin_amdgcn_update_dpp: {

clang/test/CIR/CodeGen/HIP/builtins-amdgcn.hip

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@@ -275,3 +275,13 @@ __device__ void test_div_fmas_f32(double* out, float a, float b, float c, int d)
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__device__ void test_div_fmas_f64(double* out, double a, double b, double c, int d) {
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*out = __builtin_amdgcn_div_fmas(a, b, c, d);
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}
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// CIR-LABEL: @_Z19test_ds_swizzle_i32Pii
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// CIR: cir.llvm.intrinsic "amdgcn.ds.swizzle" {{.*}} : (!s32i, !s32i) -> !s32i
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// LLVM: define{{.*}} void @_Z19test_ds_swizzle_i32Pii
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// LLVM: call i32 @llvm.amdgcn.ds.swizzle(i32 %{{.*}}, i32 32)
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// OGCG: define{{.*}} void @_Z19test_ds_swizzle_i32Pii
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// OGCG: call i32 @llvm.amdgcn.ds.swizzle(i32 %{{.*}}, i32 32)
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__device__ void test_ds_swizzle_i32(int* out, int a) {
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*out = __builtin_amdgcn_ds_swizzle(a, 32);
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}

clang/test/CIR/CodeGen/OpenCL/builtins_amdgcn.cl

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@@ -288,3 +288,13 @@ void test_div_fmas_f64(global double* out, double a, double b, double c, int d)
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{
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*out = __builtin_amdgcn_div_fmas(a, b, c, d);
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}
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// CIR-LABEL: @test_ds_swizzle
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// CIR: cir.llvm.intrinsic "amdgcn.ds.swizzle" {{.*}} : (!s32i, !s32i) -> !s32i
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// LLVM: define{{.*}} void @test_ds_swizzle
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// LLVM: call i32 @llvm.amdgcn.ds.swizzle(i32 %{{.*}}, i32 32)
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// OGCG: define{{.*}} void @test_ds_swizzle
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// OGCG: call i32 @llvm.amdgcn.ds.swizzle(i32 %{{.*}}, i32 32)
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void test_ds_swizzle(global int* out, int a) {
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*out = __builtin_amdgcn_ds_swizzle(a, 32);
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}

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