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@@ -7,7 +7,7 @@ Simple UART (Universal Asynchronous Receiver & Transmitter) module for serial co
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The UART module was tested in hardware. In the near future it will be implemented generic support for parity bit and set the number of stop bits. Stay tuned!
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**Synthesis resource usage summary:**
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- Logic element (LUT): 85
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- Logic element (LUT): 77
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- Registers (FF): 51
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*Synthesis was performed using Quartus II 64-Bit Version 13.0.1 with default settings.*
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