Update private pytorch patchs for release (#1679)

Chao1Han · web-flow · commit 68ecf92872b0 · 2022-10-24T13:54:08.000+08:00
diff --git a/third_party/oneDNN b/third_party/oneDNN
@@ -1 +1 @@
-Subproject commit 650085b2f3643aad05c629425983491d63b5c289
+Subproject commit 6224dc6b3e2073c98f4b8278bf7e87769dd85a55
diff --git a/torch_patches/0001-add-SparseXPU-to-dispatch-key-set-25.patch b/torch_patches/0001-add-SparseXPU-to-dispatch-key-set-25.patch
@@ -1,7 +1,7 @@
 From c01f049d638a48e2ac01ded9baaca3fb8589107c Mon Sep 17 00:00:00 2001
 From: majing921201 <jing1.ma@intel.com>
 Date: Fri, 11 Feb 2022 10:16:42 +0800
-Subject: [PATCH 01/35] add SparseXPU to dispatch key set (#25)
+Subject: [PATCH 01/36] add SparseXPU to dispatch key set (#25)
 
 Signed-off-by: Ma, Jing1 <jing1.ma@intel.com>
 ---
diff --git a/torch_patches/0002-Add-QuantizedXPU-to-DispatchKeySet-28.patch b/torch_patches/0002-Add-QuantizedXPU-to-DispatchKeySet-28.patch
@@ -1,7 +1,7 @@
 From a642474c362816032917045b138adaa185d1bf0b Mon Sep 17 00:00:00 2001
 From: xiaolil1 <xiaoli.liu@intel.com>
 Date: Tue, 15 Feb 2022 14:01:53 +0800
-Subject: [PATCH 02/35] Add QuantizedXPU to DispatchKeySet (#28)
+Subject: [PATCH 02/36] Add QuantizedXPU to DispatchKeySet (#28)
 
 ---
  c10/core/DispatchKeySet.h | 1 +
diff --git a/torch_patches/0003-channels-last-1d-for-rebase-pytorch-1.10-29.patch b/torch_patches/0003-channels-last-1d-for-rebase-pytorch-1.10-29.patch
@@ -1,7 +1,7 @@
 From be2033436a83b80f91e9bd793802a3ad96875122 Mon Sep 17 00:00:00 2001
 From: KevinYuk <kevin.yu@intel.com>
 Date: Mon, 21 Feb 2022 16:49:34 +0800
-Subject: [PATCH 03/35] channels last 1d for rebase pytorch 1.10 (#29)
+Subject: [PATCH 03/36] channels last 1d for rebase pytorch 1.10 (#29)
 
 ---
  aten/src/ATen/core/TensorBase.h           |  8 ++-
diff --git a/torch_patches/0004-JIT-disable-decomposition-of-BN-LN-for-XPU-31.patch b/torch_patches/0004-JIT-disable-decomposition-of-BN-LN-for-XPU-31.patch
@@ -1,7 +1,7 @@
 From fac1bb693309722b047abf8c13efc81548927fbf Mon Sep 17 00:00:00 2001
 From: Feng Yuan <feng1.yuan@intel.com>
 Date: Thu, 24 Feb 2022 15:23:23 +0800
-Subject: [PATCH 04/35] JIT: disable decomposition of BN/LN for XPU (#31)
+Subject: [PATCH 04/36] JIT: disable decomposition of BN/LN for XPU (#31)
 
 Signed-off-by: Feng Yuan <feng1.yuan@intel.com>
 ---
diff --git a/torch_patches/0005-Add-xpu-for-ddp-fix-the-index-error-in-bert-training.patch b/torch_patches/0005-Add-xpu-for-ddp-fix-the-index-error-in-bert-training.patch
@@ -1,7 +1,7 @@
 From 916d02cf3318858f56c68d7ec6c336eea7f75e87 Mon Sep 17 00:00:00 2001
 From: zhuhong61 <95205772+zhuhong61@users.noreply.github.com>
 Date: Tue, 1 Mar 2022 14:24:08 +0800
-Subject: [PATCH 05/35] Add xpu for ddp (fix the index error in bert training)
+Subject: [PATCH 05/36] Add xpu for ddp (fix the index error in bert training)
  (#27)
 
 ---
diff --git a/torch_patches/0006-enable-channels-last-for-xpu-group-norm-32.patch b/torch_patches/0006-enable-channels-last-for-xpu-group-norm-32.patch
@@ -1,7 +1,7 @@
 From 206c68c039d43655648a0f8cf3c07025355a3fdf Mon Sep 17 00:00:00 2001
 From: KevinYuk <kevin.yu@intel.com>
 Date: Wed, 2 Mar 2022 10:45:52 +0800
-Subject: [PATCH 06/35] enable channels last for xpu group norm (#32)
+Subject: [PATCH 06/36] enable channels last for xpu group norm (#32)
 
 ---
  aten/src/ATen/native/group_norm.cpp | 2 +-
diff --git a/torch_patches/0007-Add-xpu-legacy-profiler-30.patch b/torch_patches/0007-Add-xpu-legacy-profiler-30.patch
@@ -1,7 +1,7 @@
 From f33532427193bf0b9498bd9ac03c36a09071e05d Mon Sep 17 00:00:00 2001
 From: "Xunsong, Huang" <xunsong.huang@intel.com>
 Date: Thu, 3 Mar 2022 14:15:47 +0800
-Subject: [PATCH 07/35] Add xpu legacy profiler (#30)
+Subject: [PATCH 07/36] Add xpu legacy profiler (#30)
 
 Signed-off-by: Xunsong, Huang <xunsong.huang@intel.com>
 ---
diff --git a/torch_patches/0008-Properly-import-LooseVersion-69904-33.patch b/torch_patches/0008-Properly-import-LooseVersion-69904-33.patch
@@ -1,7 +1,7 @@
 From 3d2e432aa55290bfd2078e1a8165c93f7518a0c3 Mon Sep 17 00:00:00 2001
 From: Guo Yejun <yejun.guo@intel.com>
 Date: Mon, 14 Mar 2022 12:01:37 +0800
-Subject: [PATCH 08/35] Properly import LooseVersion (#69904) (#33)
+Subject: [PATCH 08/36] Properly import LooseVersion (#69904) (#33)
 
 cherry-pick 07767569c964552702bf374da753212eb9cde327, with conflict
 fixed in test, to fix issue with higher version of setuptools 60.9.3
diff --git a/torch_patches/0009-upgrade-protobuf-from-tag-v3.13.0.1-d1eca4e4-to-v3.1.patch b/torch_patches/0009-upgrade-protobuf-from-tag-v3.13.0.1-d1eca4e4-to-v3.1.patch
@@ -1,7 +1,7 @@
 From c9fdbae991eabd295a7fd8576453e702e023c7f0 Mon Sep 17 00:00:00 2001
 From: Guo Yejun <yejun.guo@intel.com>
 Date: Mon, 21 Mar 2022 18:56:25 +0800
-Subject: [PATCH 09/35] upgrade protobuf from tag: v3.13.0.1 (d1eca4e4) to
+Subject: [PATCH 09/36] upgrade protobuf from tag: v3.13.0.1 (d1eca4e4) to
  v3.18.2 (6c6b0778) (#34)
 
 due to the vulnerability discovered at
diff --git a/torch_patches/0010-7.Add-API-for-intel-XPU-to-register-new-tensor-type..patch b/torch_patches/0010-7.Add-API-for-intel-XPU-to-register-new-tensor-type..patch
@@ -1,7 +1,7 @@
 From e583a1b78114c24d7653636f56455ea25e6dfffd Mon Sep 17 00:00:00 2001
 From: chengjunlu <chengjun.lu@intel.com>
 Date: Thu, 7 Apr 2022 12:11:01 +0800
-Subject: [PATCH 10/35] 7.Add API for intel XPU to register new tensor type.
+Subject: [PATCH 10/36] 7.Add API for intel XPU to register new tensor type.
  (#36)
 
 ---
diff --git a/torch_patches/0011-add-python-API-to-print-all-operators-that-have-kern.patch b/torch_patches/0011-add-python-API-to-print-all-operators-that-have-kern.patch
@@ -1,7 +1,7 @@
 From ca942ce28515a826d70a515ddeebd10076ae0b6a Mon Sep 17 00:00:00 2001
 From: zhuhong61 <95205772+zhuhong61@users.noreply.github.com>
 Date: Thu, 14 Apr 2022 11:25:28 +0800
-Subject: [PATCH 11/35] add python API to print all operators that have kernels
+Subject: [PATCH 11/36] add python API to print all operators that have kernels
  registered to a particular DispatchKey (#63575) (#38)
 
 Summary: Pull Request resolved: https://github.com/pytorch/pytorch/pull/63575
diff --git a/torch_patches/0012-More-distutils.version.LooseVersion-changes-69947-43.patch b/torch_patches/0012-More-distutils.version.LooseVersion-changes-69947-43.patch
@@ -1,7 +1,7 @@
 From cb9f926ad257791545466cc6be1774df19828ef3 Mon Sep 17 00:00:00 2001
 From: Kim <kimyangbaochen@vip.qq.com>
 Date: Mon, 18 Apr 2022 16:30:24 +0800
-Subject: [PATCH 12/35] More distutils.version.LooseVersion changes (#69947)
+Subject: [PATCH 12/36] More distutils.version.LooseVersion changes (#69947)
  (#43)
 
 Summary: Pull Request resolved: https://github.com/pytorch/pytorch/pull/69947
diff --git a/torch_patches/0013-Fix-issue-in-sparse-op-only-checks-the-CUDA-device-4.patch b/torch_patches/0013-Fix-issue-in-sparse-op-only-checks-the-CUDA-device-4.patch
@@ -1,7 +1,7 @@
 From 3453dab17d9a5795b4448aee6a595e4206026b22 Mon Sep 17 00:00:00 2001
 From: chengjunlu <chengjun.lu@intel.com>
 Date: Mon, 9 May 2022 09:16:56 +0800
-Subject: [PATCH 13/35] Fix issue in sparse op only checks the CUDA device
+Subject: [PATCH 13/36] Fix issue in sparse op only checks the CUDA device
  (#48)
 
 ---
diff --git a/torch_patches/0014-Fix-pytorch-issue-in-sparce_coo_tensor-46.patch b/torch_patches/0014-Fix-pytorch-issue-in-sparce_coo_tensor-46.patch
@@ -1,7 +1,7 @@
 From 5d95de97cb99bf541a85f89212b8417ee1970017 Mon Sep 17 00:00:00 2001
 From: chengjunlu <chengjun.lu@intel.com>
 Date: Mon, 9 May 2022 09:20:27 +0800
-Subject: [PATCH 14/35] Fix pytorch issue in sparce_coo_tensor (#46)
+Subject: [PATCH 14/36] Fix pytorch issue in sparce_coo_tensor (#46)
 
 ---
  aten/src/ATen/native/sparse/SparseTensor.cpp | 2 +-
diff --git a/torch_patches/0015-Enhance-the-_rebuild_qtensor-to-support-other-device.patch b/torch_patches/0015-Enhance-the-_rebuild_qtensor-to-support-other-device.patch
@@ -1,7 +1,7 @@
 From 81642df65495a71c395af9a611877348b894e74f Mon Sep 17 00:00:00 2001
 From: chengjunlu <chengjun.lu@intel.com>
 Date: Thu, 26 May 2022 14:13:35 +0800
-Subject: [PATCH 15/35] Enhance the _rebuild_qtensor to support other device
+Subject: [PATCH 15/36] Enhance the _rebuild_qtensor to support other device
  type other than CPU. (#49)
 
 ---
diff --git a/torch_patches/0016-hook-XPU-device-in-get_current_device_index-API.-45.patch b/torch_patches/0016-hook-XPU-device-in-get_current_device_index-API.-45.patch
@@ -1,7 +1,7 @@
 From 496f22ff6d08813edda35b75fa5d5a19a6295018 Mon Sep 17 00:00:00 2001
 From: Feng Yuan <feng1.yuan@intel.com>
 Date: Thu, 26 May 2022 14:14:37 +0800
-Subject: [PATCH 16/35] hook XPU device in get_current_device_index API. (#45)
+Subject: [PATCH 16/36] hook XPU device in get_current_device_index API. (#45)
 
 * hook XPU device in get_current_device_index API.
 usage: get_device_properties("xpu") where no device id provided
diff --git a/torch_patches/0017-Add-SYCL-half-type-support-to-c10-Half-40.patch b/torch_patches/0017-Add-SYCL-half-type-support-to-c10-Half-40.patch
@@ -1,7 +1,7 @@
 From 38d4b0415adf94676878059b4622c1d6bc1a9b56 Mon Sep 17 00:00:00 2001
 From: ch <hao3.chen@intel.com>
 Date: Thu, 26 May 2022 14:28:42 +0800
-Subject: [PATCH 17/35] Add SYCL half type support to c10::Half (#40)
+Subject: [PATCH 17/36] Add SYCL half type support to c10::Half (#40)
 
 ---
  c10/util/Half-inl.h | 13 ++++++++++++-
diff --git a/torch_patches/0018-add-XPU-support-for-autocast-35.patch b/torch_patches/0018-add-XPU-support-for-autocast-35.patch
@@ -1,7 +1,7 @@
 From d02a1bf33505cbf4d5b150590e8943eb39cc1674 Mon Sep 17 00:00:00 2001
 From: Guo Yejun <yejun.guo@intel.com>
 Date: Thu, 26 May 2022 14:32:24 +0800
-Subject: [PATCH 18/35] add XPU support for autocast (#35)
+Subject: [PATCH 18/36] add XPU support for autocast (#35)
 
 Co-authored-by: xiaolil1 <xiaoli.liu@intel.com>
 ---
diff --git a/torch_patches/0019-Add-the-device-module-to-the-module-list-with-the-na.patch b/torch_patches/0019-Add-the-device-module-to-the-module-list-with-the-na.patch
@@ -1,7 +1,7 @@
 From d033511e7fdf63f83d29f52db98011bd3c2ab49b Mon Sep 17 00:00:00 2001
 From: chengjunlu <chengjun.lu@intel.com>
 Date: Wed, 1 Jun 2022 09:16:43 +0800
-Subject: [PATCH 19/35] Add the device module to the module list with the name
+Subject: [PATCH 19/36] Add the device module to the module list with the name
  of torch.xxx in _register_device_module. The user can use the extension
  device module as a native module in torch namespace. (#50)
 
diff --git a/torch_patches/0020-Add-DLPack-support-to-pytorch1.10-51.patch b/torch_patches/0020-Add-DLPack-support-to-pytorch1.10-51.patch
@@ -1,7 +1,7 @@
 From 15e0f70b6a267c8356a00349cac9622974169aa4 Mon Sep 17 00:00:00 2001
 From: chengjunlu <chengjun.lu@intel.com>
 Date: Thu, 2 Jun 2022 15:15:21 +0800
-Subject: [PATCH 20/35] Add DLPack support to pytorch1.10 (#51)
+Subject: [PATCH 20/36] Add DLPack support to pytorch1.10 (#51)
 
 ---
  aten/src/ATen/Context.h                    |  8 ++
diff --git a/torch_patches/0021-Use-sycl-bit_cast-for-negative-half-conversion-52.patch b/torch_patches/0021-Use-sycl-bit_cast-for-negative-half-conversion-52.patch
@@ -1,7 +1,7 @@
 From 2e33d5167dce2ec80cd84483eba7e473eda1ce52 Mon Sep 17 00:00:00 2001
 From: ch <hao3.chen@intel.com>
 Date: Thu, 2 Jun 2022 21:05:32 +0800
-Subject: [PATCH 21/35] Use sycl::bit_cast for negative half conversion (#52)
+Subject: [PATCH 21/36] Use sycl::bit_cast for negative half conversion (#52)
 
 ---
  c10/util/Half-inl.h | 2 +-
diff --git a/torch_patches/0022-PyTorch-Add-fused-addmm-path-in-linear-for-contiguou.patch b/torch_patches/0022-PyTorch-Add-fused-addmm-path-in-linear-for-contiguou.patch
@@ -1,7 +1,7 @@
 From 5e735105ac4fa444433b849ce1690b4c8c35b1ca Mon Sep 17 00:00:00 2001
 From: Jinghui <jinghui.gu@intel.com>
 Date: Mon, 25 Jul 2022 12:01:01 +0800
-Subject: [PATCH 22/35] [PyTorch] Add fused addmm path in linear for contiguous
+Subject: [PATCH 22/36] [PyTorch] Add fused addmm path in linear for contiguous
  3D input (#72728) (#57)
 
 Summary:
diff --git a/torch_patches/0023-Add-caveat-for-build-failure-in-README-54.patch b/torch_patches/0023-Add-caveat-for-build-failure-in-README-54.patch
@@ -1,7 +1,7 @@
 From 03912b54edc81d6d2a895dc01404e638e43a9a0e Mon Sep 17 00:00:00 2001
 From: Ye Ting <ting.ye@intel.com>
 Date: Mon, 25 Jul 2022 12:01:33 +0800
-Subject: [PATCH 23/35] Add caveat for build failure in README (#54)
+Subject: [PATCH 23/36] Add caveat for build failure in README (#54)
 
 * Add cavert for build failure
 
diff --git a/torch_patches/0024-Speedup-Philox-on-XPU-device-58.patch b/torch_patches/0024-Speedup-Philox-on-XPU-device-58.patch
@@ -1,7 +1,7 @@
 From 28c69d4b4a71a71b2919cc3cb4ad22d8edd933ea Mon Sep 17 00:00:00 2001
 From: wuhuikx <hui.h.wu@intel.com>
 Date: Fri, 5 Aug 2022 15:00:23 +0800
-Subject: [PATCH 24/35] Speedup Philox on XPU device (#58)
+Subject: [PATCH 24/36] Speedup Philox on XPU device (#58)
 
 ---
  aten/src/ATen/core/PhiloxRNGEngine.h | 7 +++++++
diff --git a/torch_patches/0025-Revert-channels-last-1d-for-rebase-pytorch-1.10-29-5.patch b/torch_patches/0025-Revert-channels-last-1d-for-rebase-pytorch-1.10-29-5.patch
@@ -1,7 +1,7 @@
 From 8cab93822010cd5eef89cad9900701f8da5051d3 Mon Sep 17 00:00:00 2001
 From: KevinYuk <kevin.yu@intel.com>
 Date: Fri, 5 Aug 2022 15:04:30 +0800
-Subject: [PATCH 25/35] Revert "channels last 1d for rebase pytorch 1.10 (#29)"
+Subject: [PATCH 25/36] Revert "channels last 1d for rebase pytorch 1.10 (#29)"
  (#53)
 
 This reverts commit be2033436a83b80f91e9bd793802a3ad96875122.
diff --git a/torch_patches/0026-Add-xpu-path-for-GRUCell-61.patch b/torch_patches/0026-Add-xpu-path-for-GRUCell-61.patch
@@ -1,7 +1,7 @@
 From d9d6d5b62d14716bb7170b8d52aa228a60224b30 Mon Sep 17 00:00:00 2001
 From: zhuyuhua-v <yuhua.zhu@intel.com>
 Date: Thu, 18 Aug 2022 21:06:43 +0800
-Subject: [PATCH 26/35] Add xpu path for GRUCell (#61)
+Subject: [PATCH 26/36] Add xpu path for GRUCell (#61)
 
 Signed-off-by: zhuyuhuav <yuhua.zhu@intel.com>
 
diff --git a/torch_patches/0027-SYCL-BF16-intrinsic-60.patch b/torch_patches/0027-SYCL-BF16-intrinsic-60.patch
@@ -1,7 +1,7 @@
 From d212b0374a45fc00e624b2bd05a97edd780fa572 Mon Sep 17 00:00:00 2001
 From: ch <hao3.chen@intel.com>
 Date: Thu, 1 Sep 2022 00:46:22 +0800
-Subject: [PATCH 27/35] SYCL BF16 intrinsic (#60)
+Subject: [PATCH 27/36] SYCL BF16 intrinsic (#60)
 
 * Add SYCL bfloat16 type support to c10::BFloat16
 
diff --git a/torch_patches/0028-add-a-SYCL-device-version-assertation-63.patch b/torch_patches/0028-add-a-SYCL-device-version-assertation-63.patch
@@ -1,7 +1,7 @@
 From 725fe5774d0cc9e7cf2d9d21b8d75c5c28b8aefc Mon Sep 17 00:00:00 2001
 From: "Yu, Guangye" <106960996+guangyey@users.noreply.github.com>
 Date: Thu, 1 Sep 2022 00:47:07 +0800
-Subject: [PATCH 28/35] add a SYCL device version assertation (#63)
+Subject: [PATCH 28/36] add a SYCL device version assertation (#63)
 
 * add a SYCL device version assertation
 
diff --git a/torch_patches/0029-fix-dispatch-declaration-bug-about-quantized-op-64.patch b/torch_patches/0029-fix-dispatch-declaration-bug-about-quantized-op-64.patch
@@ -1,7 +1,7 @@
 From 4bd47d798c959fe975dae4aa42584d67b45f01ff Mon Sep 17 00:00:00 2001
 From: "Yu, Guangye" <106960996+guangyey@users.noreply.github.com>
 Date: Wed, 7 Sep 2022 09:09:01 +0800
-Subject: [PATCH 29/35] fix dispatch declaration bug about quantized op (#64)
+Subject: [PATCH 29/36] fix dispatch declaration bug about quantized op (#64)
 
 ---
  aten/src/ATen/native/native_functions.yaml | 4 ++++
diff --git a/torch_patches/0030-Dispatch-for-xpu-in-adaptive_avg_pooling-62.patch b/torch_patches/0030-Dispatch-for-xpu-in-adaptive_avg_pooling-62.patch
@@ -1,7 +1,7 @@
 From 3702f05af71e723ad3d235f95919f5ba133859a8 Mon Sep 17 00:00:00 2001
 From: ch <hao3.chen@intel.com>
 Date: Fri, 16 Sep 2022 11:53:39 +0800
-Subject: [PATCH 30/35] Dispatch for xpu in adaptive_avg_pooling (#62)
+Subject: [PATCH 30/36] Dispatch for xpu in adaptive_avg_pooling (#62)
 
 * Dispatch adaptive_avg_pool2d for XPU
 
diff --git a/torch_patches/0031-Enhance-non-cpu-qtensor-serialization-support-55.patch b/torch_patches/0031-Enhance-non-cpu-qtensor-serialization-support-55.patch
@@ -1,7 +1,7 @@
 From da85e004916dbb25de29f990ebb342333616650e Mon Sep 17 00:00:00 2001
 From: Zhiwei <532707544@qq.com>
 Date: Fri, 30 Sep 2022 17:30:59 +0800
-Subject: [PATCH 31/35] Enhance non-cpu qtensor serialization support (#55)
+Subject: [PATCH 31/36] Enhance non-cpu qtensor serialization support (#55)
 
 * Use empty_quantized for pickling int8 tensor
 * Add fake size setting when unpickling qtensor
diff --git a/torch_patches/0032-enable-pin-memory-on-xpu-67.patch b/torch_patches/0032-enable-pin-memory-on-xpu-67.patch
@@ -1,7 +1,7 @@
 From ec76f1d45f4affe39aa8a284a368f7f92eb06401 Mon Sep 17 00:00:00 2001
 From: leizhenyuan <110007460+leizhenyuan@users.noreply.github.com>
 Date: Sat, 8 Oct 2022 14:39:39 +0800
-Subject: [PATCH 32/35] enable pin memory on xpu (#67)
+Subject: [PATCH 32/36] enable pin memory on xpu (#67)
 
 * enable pin memory on xpu
 ---
diff --git a/torch_patches/0033-Revert-enable-pin-memory-on-xpu-67-69.patch b/torch_patches/0033-Revert-enable-pin-memory-on-xpu-67-69.patch
@@ -1,7 +1,7 @@
 From e80dae14711376bd01ac34dadf1d9b0b01068dd2 Mon Sep 17 00:00:00 2001
 From: leizhenyuan <110007460+leizhenyuan@users.noreply.github.com>
 Date: Sat, 8 Oct 2022 17:24:32 +0800
-Subject: [PATCH 33/35] Revert "enable pin memory on xpu (#67)" (#69)
+Subject: [PATCH 33/36] Revert "enable pin memory on xpu (#67)" (#69)
 
 This reverts commit ec76f1d45f4affe39aa8a284a368f7f92eb06401.
 ---
diff --git a/torch_patches/0034-port-from-pytorch-and-add-xpu-device-71.patch b/torch_patches/0034-port-from-pytorch-and-add-xpu-device-71.patch
@@ -1,7 +1,7 @@
 From 878b181bce5648570c3c09283767a99bb8767486 Mon Sep 17 00:00:00 2001
 From: leizhenyuan <110007460+leizhenyuan@users.noreply.github.com>
 Date: Sun, 9 Oct 2022 14:57:07 +0800
-Subject: [PATCH 34/35] port from pytorch and add xpu device (#71)
+Subject: [PATCH 34/36] port from pytorch and add xpu device (#71)
 
 ---
  torch/utils/data/_utils/pin_memory.py | 43 ++++++++++++++++++--------
diff --git a/torch_patches/0035-Fix-Windows-build-72.patch b/torch_patches/0035-Fix-Windows-build-72.patch
@@ -1,7 +1,7 @@
 From 6c1c578a4cbeda5d515c89f5e6bcfb948d93ea1c Mon Sep 17 00:00:00 2001
 From: sanchitintel <sanchit.jain@intel.com>
 Date: Mon, 10 Oct 2022 00:10:39 +0000
-Subject: [PATCH 35/35] Fix Windows build (#72)
+Subject: [PATCH 35/36] Fix Windows build (#72)
 
 __declspec(dllexport) should be present in the declaration as well, if it's present in the definition
 ---
diff --git a/torch_patches/0036-Revert-SYCL-BF16-intrinsic-60-73.patch b/torch_patches/0036-Revert-SYCL-BF16-intrinsic-60-73.patch
