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Reorg and update torch patches for PyTorch 1.10 (#1695)
Signed-off-by: Gu, Jinghui <jinghui.gu@intel.com>
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torch_patches/0001-add-SparseXPU-to-dispatch-key-set-25.patch

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From c01f049d638a48e2ac01ded9baaca3fb8589107c Mon Sep 17 00:00:00 2001
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From b27bdfe9139a84c762aab173f29991cd1b2aa9ab Mon Sep 17 00:00:00 2001
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From: majing921201 <jing1.ma@intel.com>
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Date: Fri, 11 Feb 2022 10:16:42 +0800
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Subject: [PATCH 01/36] add SparseXPU to dispatch key set (#25)
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Subject: [PATCH 01/28] add SparseXPU to dispatch key set (#25)
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Signed-off-by: Ma, Jing1 <jing1.ma@intel.com>
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torch_patches/0002-Add-QuantizedXPU-to-DispatchKeySet-28.patch

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From a642474c362816032917045b138adaa185d1bf0b Mon Sep 17 00:00:00 2001
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From 815d3da1ef69a241269d9f1b51e6ac03b0303286 Mon Sep 17 00:00:00 2001
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From: xiaolil1 <xiaoli.liu@intel.com>
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Date: Tue, 15 Feb 2022 14:01:53 +0800
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Subject: [PATCH 02/36] Add QuantizedXPU to DispatchKeySet (#28)
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Subject: [PATCH 02/28] Add QuantizedXPU to DispatchKeySet (#28)
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c10/core/DispatchKeySet.h | 1 +

torch_patches/0003-channels-last-1d-for-rebase-pytorch-1.10-29.patch

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torch_patches/0006-enable-channels-last-for-xpu-group-norm-32.patch renamed to torch_patches/0003-enable-channels-last-for-xpu-group-norm-32.patch

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From 206c68c039d43655648a0f8cf3c07025355a3fdf Mon Sep 17 00:00:00 2001
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From a7b5ef1005cbed1ebe74a411386b7bb1dd31b65e Mon Sep 17 00:00:00 2001
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From: KevinYuk <kevin.yu@intel.com>
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Date: Wed, 2 Mar 2022 10:45:52 +0800
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Subject: [PATCH 06/36] enable channels last for xpu group norm (#32)
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Subject: [PATCH 03/28] enable channels last for xpu group norm (#32)
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aten/src/ATen/native/group_norm.cpp | 2 +-

torch_patches/0009-upgrade-protobuf-from-tag-v3.13.0.1-d1eca4e4-to-v3.1.patch renamed to torch_patches/0004-upgrade-protobuf-from-tag-v3.13.0.1-d1eca4e4-to-v3.1.patch

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From c9fdbae991eabd295a7fd8576453e702e023c7f0 Mon Sep 17 00:00:00 2001
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From 0aced766f1ed27e4d3265c01d72e2512e0d7da39 Mon Sep 17 00:00:00 2001
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From: Guo Yejun <yejun.guo@intel.com>
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Date: Mon, 21 Mar 2022 18:56:25 +0800
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Subject: [PATCH 09/36] upgrade protobuf from tag: v3.13.0.1 (d1eca4e4) to
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Subject: [PATCH 04/28] upgrade protobuf from tag: v3.13.0.1 (d1eca4e4) to
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v3.18.2 (6c6b0778) (#34)
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due to the vulnerability discovered at

torch_patches/0004-JIT-disable-decomposition-of-BN-LN-for-XPU-31.patch renamed to torch_patches/0005-adjust-conditions-to-enable-jit-decomposition-pass-o.patch

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From fac1bb693309722b047abf8c13efc81548927fbf Mon Sep 17 00:00:00 2001
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From e3e3a887f1e2fe1a2c5ceb1530b1c79b2a5e9beb Mon Sep 17 00:00:00 2001
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From: Feng Yuan <feng1.yuan@intel.com>
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Date: Thu, 24 Feb 2022 15:23:23 +0800
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Subject: [PATCH 04/36] JIT: disable decomposition of BN/LN for XPU (#31)
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Date: Mon, 21 Mar 2022 14:23:28 -0700
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Subject: [PATCH 05/28] adjust conditions to enable jit decomposition pass only
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for GPU device (#73637)
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Summary:
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Signed-off-by: Feng Yuan <feng1.yuan@intel.com>
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Pull Request resolved: https://github.com/pytorch/pytorch/pull/73637
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Reviewed By: cpuhrsch
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Differential Revision: D34931641
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Pulled By: davidberard98
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fbshipit-source-id: 849ace475eb9038912e902462f0eb2cdebc14ada
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(cherry picked from commit ae61c4fba20345c0122f24e02c661b0da29f0ee4)
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torch/csrc/jit/passes/decompose_ops.cpp | 2 +-
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diff --git a/torch/csrc/jit/passes/decompose_ops.cpp b/torch/csrc/jit/passes/decompose_ops.cpp
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index 0706c9c14a..e2db04b0aa 100644
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index 0706c9c14a..4223c72658 100644
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--- a/torch/csrc/jit/passes/decompose_ops.cpp
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+++ b/torch/csrc/jit/passes/decompose_ops.cpp
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@@ -42,7 +42,7 @@ bool isDecomposableNorm(Node* normalize_op) {
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auto device = input->type()->expectRef<TensorType>().device();
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// As of now, we do the decomposition for batchnorm/layernorm on GPU device
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// only
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- if (!device || (*device).is_cpu()) {
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+ if (!device || (*device).is_cpu() || (*device).is_xpu()) {
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+ if (!device || !(*device).is_cuda()) {
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return false;
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}
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torch_patches/0005-Add-xpu-for-ddp-fix-the-index-error-in-bert-training.patch renamed to torch_patches/0006-Add-xpu-for-ddp-fix-the-index-error-in-bert-training.patch

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From 916d02cf3318858f56c68d7ec6c336eea7f75e87 Mon Sep 17 00:00:00 2001
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From 9a60b998821f8f5ea8547ea28a80c2be1f74c875 Mon Sep 17 00:00:00 2001
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From: zhuhong61 <95205772+zhuhong61@users.noreply.github.com>
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Date: Tue, 1 Mar 2022 14:24:08 +0800
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Subject: [PATCH 05/36] Add xpu for ddp (fix the index error in bert training)
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Subject: [PATCH 06/28] Add xpu for ddp (fix the index error in bert training)
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(#27)
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torch_patches/0011-add-python-API-to-print-all-operators-that-have-kern.patch renamed to torch_patches/0007-add-python-API-to-print-all-operators-that-have-kern.patch

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From ca942ce28515a826d70a515ddeebd10076ae0b6a Mon Sep 17 00:00:00 2001
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From e28446e89b1484c0c7fb360bfae038e2b46006ae Mon Sep 17 00:00:00 2001
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From: zhuhong61 <95205772+zhuhong61@users.noreply.github.com>
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Date: Thu, 14 Apr 2022 11:25:28 +0800
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Subject: [PATCH 11/36] add python API to print all operators that have kernels
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Subject: [PATCH 07/28] add python API to print all operators that have kernels
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registered to a particular DispatchKey (#63575) (#38)
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Summary: Pull Request resolved: https://github.com/pytorch/pytorch/pull/63575

torch_patches/0012-More-distutils.version.LooseVersion-changes-69947-43.patch renamed to torch_patches/0008-More-distutils.version.LooseVersion-changes-69947-43.patch

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From 377e0459f6fe5a455ccefb635d250a40445f01dc Mon Sep 17 00:00:00 2001
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From: Kim <kimyangbaochen@vip.qq.com>
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Date: Mon, 18 Apr 2022 16:30:24 +0800
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Subject: [PATCH 12/36] More distutils.version.LooseVersion changes (#69947)
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Subject: [PATCH 08/28] More distutils.version.LooseVersion changes (#69947)
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(#43)
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Summary: Pull Request resolved: https://github.com/pytorch/pytorch/pull/69947

torch_patches/0014-Fix-pytorch-issue-in-sparce_coo_tensor-46.patch renamed to torch_patches/0009-Fix-issue-in-sparce_coo_tensor-only-supporting-CUDA-.patch

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From 5d95de97cb99bf541a85f89212b8417ee1970017 Mon Sep 17 00:00:00 2001
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From: chengjunlu <chengjun.lu@intel.com>
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Date: Mon, 9 May 2022 09:20:27 +0800
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Subject: [PATCH 14/36] Fix pytorch issue in sparce_coo_tensor (#46)
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From 09a779feae2c14ef309e5057229cce4ed7bbf5df Mon Sep 17 00:00:00 2001
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From: johnlu <chengjun.lu@intel.com>
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Date: Tue, 26 Apr 2022 00:56:10 +0000
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Subject: [PATCH 09/28] Fix issue in sparce_coo_tensor only supporting CUDA
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device.
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## Motivation
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The at::native::_validate_sparse_coo_tensor_args only supports checking the indices on CUDA device and CPU device. To extend the function to support more device type.
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## Solution
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Copy the indices to the CPU to validate the correctness.
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Pull Request resolved: https://github.com/pytorch/pytorch/pull/76293
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Approved by: https://github.com/mrshenli
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aten/src/ATen/native/sparse/SparseTensor.cpp | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)

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