iommu/arm: Add BBM Level 2 smmu feature

JIRA: https://issues.redhat.com/browse/RHEL-122955

commit 212c439
Author: =?UTF-8?q?Miko=C5=82aj=20Lenczewski?= <miko.lenczewski@arm.com>
Date: Wed, 25 Jun 2025 11:34:34 +0000

    For supporting BBM Level 2 for userspace mappings, we want to ensure
    that the smmu also supports its own version of BBM Level 2. Luckily, the
    smmu spec (IHI 0070G 3.21.1.3) is stricter than the aarch64 spec (DDI
    0487K.a D8.16.2), so already guarantees that no aborts are raised when
    BBM level 2 is claimed.

    Add the feature and testing for it under arm_smmu_sva_supported().

    Signed-off-by: Mikołaj Lenczewski <miko.lenczewski@arm.com>
    Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
    Reviewed-by: Robin Murphy <robin.murphy@arm.com>
    Reviewed-by: Ryan Roberts <ryan.roberts@arm.com>
    Link: https://lore.kernel.org/r/20250625113435.26849-4-miko.lenczewski@arm.com
    Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

Signed-off-by: Marcin Juszkiewicz <mjuszkiewicz@redhat.com>

Author: hrw

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c

@@ -222,6 +222,9 @@ bool arm_smmu_sva_supported(struct arm_smmu_device *smmu)
 		feat_mask |= ARM_SMMU_FEAT_VAX;
 	}
 
+	if (system_supports_bbml2_noabort())
+		feat_mask |= ARM_SMMU_FEAT_BBML2;
+
 	if ((smmu->features & feat_mask) != feat_mask)
 		return false;
 

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

@@ -4443,6 +4443,9 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu)
 	if (FIELD_GET(IDR3_FWB, reg))
 		smmu->features |= ARM_SMMU_FEAT_S2FWB;
 
+	if (FIELD_GET(IDR3_BBM, reg) == 2)
+		smmu->features |= ARM_SMMU_FEAT_BBML2;
+
 	/* IDR5 */
 	reg = readl_relaxed(smmu->base + ARM_SMMU_IDR5);
 

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h

@@ -60,6 +60,7 @@ struct arm_smmu_device;
 #define ARM_SMMU_IDR3			0xc
 #define IDR3_FWB			(1 << 8)
 #define IDR3_RIL			(1 << 10)
+#define IDR3_BBM			GENMASK(12, 11)
 
 #define ARM_SMMU_IDR5			0x14
 #define IDR5_STALL_MAX			GENMASK(31, 16)
@@ -755,6 +756,7 @@ struct arm_smmu_device {
 #define ARM_SMMU_FEAT_HA		(1 << 21)
 #define ARM_SMMU_FEAT_HD		(1 << 22)
 #define ARM_SMMU_FEAT_S2FWB		(1 << 23)
+#define ARM_SMMU_FEAT_BBML2		(1 << 24)
 	u32				features;
 
 #define ARM_SMMU_OPT_SKIP_PREFETCH	(1 << 0)