Request: Add Binary Layout Diagram for HLL Sketches (HLL4 / HLL6 / HLL8)

[SiddheshDhinge]

Hi DataSketches team,

I’m working with the HLL sketch family (HLL4, HLL6, HLL8) and need a clear understanding of the serialized binary layout, including:

• header structure
• Register arrays
• AuxHashMap structure for overflow
• Alignment rules and padding (if any)

It would be extremely helpful to have:

1. A visual diagram or table showing offsets, byte/bit boundaries, and field descriptions for each HLL type.
2. Confirmation that the Java and C++ implementations share an identical on-wire layout.
3. A link to any existing internal documentation if it already exists.

This would make it much easier for developers working on:

• Custom storage systems
• Memory compaction
• Cross-language interoperability

If such a document exists, could you point me to it?
If not, would the team consider adding a binary layout diagram to the HLL section of the documentation?

Thanks