@@ -76,10 +76,17 @@ set TX_SAMPLES_PER_CHANNEL [expr $TX_NUM_OF_LANES * 8*$TX_DATAPATH_WIDTH / ($TX_
7676set adc_offload_name mxfe_rx_data_offload
7777set adc_data_width [expr $RX_DMA_SAMPLE_WIDTH *$RX_NUM_OF_CONVERTERS *$RX_SAMPLES_PER_CHANNEL ]
7878set adc_dma_data_width $adc_data_width
79+ set adc_fifo_address_width [expr int(ceil(log(($adc_fifo_samples_per_converter *$RX_NUM_OF_CONVERTERS ) / ($adc_data_width /$RX_DMA_SAMPLE_WIDTH ))/log(2)))]
7980
8081set dac_offload_name mxfe_tx_data_offload
8182set dac_data_width [expr $TX_SAMPLE_WIDTH *$TX_NUM_OF_CONVERTERS *$TX_SAMPLES_PER_CHANNEL ]
8283set dac_dma_data_width [expr $TX_DMA_SAMPLE_WIDTH *$TX_NUM_OF_CONVERTERS *$TX_SAMPLES_PER_CHANNEL ]
84+ set dac_fifo_address_width [expr int(ceil(log(($dac_fifo_samples_per_converter *$TX_NUM_OF_CONVERTERS ) / ($dac_data_width /$TX_DMA_SAMPLE_WIDTH ))/log(2)))]
85+
86+ set adc_do_mem_type [ expr { [info exists ad_project_params(ADC_DO_MEM_TYPE)] \
87+ ? $ad_project_params(ADC_DO_MEM_TYPE) : 0 } ]
88+ set dac_do_mem_type [ expr { [info exists ad_project_params(DAC_DO_MEM_TYPE)] \
89+ ? $ad_project_params(DAC_DO_MEM_TYPE) : 0 } ]
8390
8491create_bd_port -dir I rx_device_clk
8592create_bd_port -dir I tx_device_clk
@@ -208,9 +215,10 @@ ad_ip_instance util_cpack2 util_mxfe_cpack [list \
208215 SAMPLE_DATA_WIDTH $RX_DMA_SAMPLE_WIDTH \
209216]
210217
218+ set adc_offload_size [expr $adc_data_width / 8 * 2**$adc_fifo_address_width ]
211219ad_data_offload_create $adc_offload_name \
212220 0 \
213- $adc_offload_type \
221+ $adc_do_mem_type \
214222 $adc_offload_size \
215223 $adc_data_width \
216224 $adc_data_width
@@ -266,9 +274,10 @@ ad_ip_instance util_upack2 util_mxfe_upack [list \
266274 SAMPLE_DATA_WIDTH $TX_SAMPLE_WIDTH \
267275]
268276
277+ set dac_offload_size [expr $dac_data_width / 8 * 2**$dac_fifo_address_width ]
269278ad_data_offload_create $dac_offload_name \
270279 1 \
271- $dac_offload_type \
280+ $dac_do_mem_type \
272281 $dac_offload_size \
273282 $dac_data_width \
274283 $dac_data_width
0 commit comments