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| 1 | +{ |
| 2 | + This file is part of: |
| 3 | + |
| 4 | + SDL3 for Pascal |
| 5 | + (https://github.com/PascalGameDevelopment/SDL3-for-Pascal) |
| 6 | + SPDX-License-Identifier: Zlib |
| 7 | +} |
| 8 | + |
| 9 | +{* |
| 10 | + * # CategoryCPUInfo |
| 11 | + * |
| 12 | + * CPU feature detection for SDL. |
| 13 | + * |
| 14 | + * These functions are largely concerned with reporting if the system has |
| 15 | + * access to various SIMD instruction sets, but also has other important info |
| 16 | + * to share, such as system RAM size and number of logical CPU cores. |
| 17 | + } |
| 18 | + |
| 19 | +{* |
| 20 | + * A guess for the cacheline size used for padding. |
| 21 | + * |
| 22 | + * Most x86 processors have a 64 byte cache line. The 64-bit PowerPC |
| 23 | + * processors have a 128 byte cache line. We use the larger value to be |
| 24 | + * generally safe. |
| 25 | + * |
| 26 | + * \since This macro is available since SDL 3.1.3. |
| 27 | + } |
| 28 | +const |
| 29 | + SDL_CACHELINE_SIZE = 128; |
| 30 | + |
| 31 | +{* |
| 32 | + * Get the number of logical CPU cores available. |
| 33 | + * |
| 34 | + * \returns the total number of logical CPU cores. On CPUs that include |
| 35 | + * technologies such as hyperthreading, the number of logical cores |
| 36 | + * may be more than the number of physical cores. |
| 37 | + * |
| 38 | + * \threadsafety It is safe to call this function from any thread. |
| 39 | + * |
| 40 | + * \since This function is available since SDL 3.1.3. |
| 41 | + } |
| 42 | +function SDL_GetNumLogicalCPUCores: cint; cdecl; |
| 43 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_GetNumLogicalCPUCores' {$ENDIF} {$ENDIF}; |
| 44 | + |
| 45 | +{* |
| 46 | + * Determine the L1 cache line size of the CPU. |
| 47 | + * |
| 48 | + * This is useful for determining multi-threaded structure padding or SIMD |
| 49 | + * prefetch sizes. |
| 50 | + * |
| 51 | + * \returns the L1 cache line size of the CPU, in bytes. |
| 52 | + * |
| 53 | + * \threadsafety It is safe to call this function from any thread. |
| 54 | + * |
| 55 | + * \since This function is available since SDL 3.1.3. |
| 56 | + } |
| 57 | +function SDL_GetCPUCacheLineSize: cint; cdecl; |
| 58 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_GetCPUCacheLineSize' {$ENDIF} {$ENDIF}; |
| 59 | + |
| 60 | +{* |
| 61 | + * Determine whether the CPU has AltiVec features. |
| 62 | + * |
| 63 | + * This always returns false on CPUs that aren't using PowerPC instruction |
| 64 | + * sets. |
| 65 | + * |
| 66 | + * \returns true if the CPU has AltiVec features or false if not. |
| 67 | + * |
| 68 | + * \threadsafety It is safe to call this function from any thread. |
| 69 | + * |
| 70 | + * \since This function is available since SDL 3.1.3. |
| 71 | + } |
| 72 | +function SDL_HasAltiVec: cbool; cdecl; |
| 73 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_HasAltiVec' {$ENDIF} {$ENDIF}; |
| 74 | +
|
| 75 | +{* |
| 76 | + * Determine whether the CPU has MMX features. |
| 77 | + * |
| 78 | + * This always returns false on CPUs that aren't using Intel instruction sets. |
| 79 | + * |
| 80 | + * \returns true if the CPU has MMX features or false if not. |
| 81 | + * |
| 82 | + * \threadsafety It is safe to call this function from any thread. |
| 83 | + * |
| 84 | + * \since This function is available since SDL 3.1.3. |
| 85 | + } |
| 86 | +function SDL_HasMMX: cbool; cdecl; |
| 87 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_HasMMX' {$ENDIF} {$ENDIF}; |
| 88 | + |
| 89 | +{* |
| 90 | + * Determine whether the CPU has SSE features. |
| 91 | + * |
| 92 | + * This always returns false on CPUs that aren't using Intel instruction sets. |
| 93 | + * |
| 94 | + * \returns true if the CPU has SSE features or false if not. |
| 95 | + * |
| 96 | + * \threadsafety It is safe to call this function from any thread. |
| 97 | + * |
| 98 | + * \since This function is available since SDL 3.1.3. |
| 99 | + * |
| 100 | + * \sa SDL_HasSSE2 |
| 101 | + * \sa SDL_HasSSE3 |
| 102 | + * \sa SDL_HasSSE41 |
| 103 | + * \sa SDL_HasSSE42 |
| 104 | + } |
| 105 | +function SDL_HasSSE: cbool; cdecl; |
| 106 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_HasSSE' {$ENDIF} {$ENDIF}; |
| 107 | +
|
| 108 | +{* |
| 109 | + * Determine whether the CPU has SSE2 features. |
| 110 | + * |
| 111 | + * This always returns false on CPUs that aren't using Intel instruction sets. |
| 112 | + * |
| 113 | + * \returns true if the CPU has SSE2 features or false if not. |
| 114 | + * |
| 115 | + * \threadsafety It is safe to call this function from any thread. |
| 116 | + * |
| 117 | + * \since This function is available since SDL 3.1.3. |
| 118 | + * |
| 119 | + * \sa SDL_HasSSE |
| 120 | + * \sa SDL_HasSSE3 |
| 121 | + * \sa SDL_HasSSE41 |
| 122 | + * \sa SDL_HasSSE42 |
| 123 | + } |
| 124 | +function SDL_HasSSE2: cbool; cdecl; |
| 125 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_HasSSE2' {$ENDIF} {$ENDIF}; |
| 126 | + |
| 127 | +{* |
| 128 | + * Determine whether the CPU has SSE3 features. |
| 129 | + * |
| 130 | + * This always returns false on CPUs that aren't using Intel instruction sets. |
| 131 | + * |
| 132 | + * \returns true if the CPU has SSE3 features or false if not. |
| 133 | + * |
| 134 | + * \threadsafety It is safe to call this function from any thread. |
| 135 | + * |
| 136 | + * \since This function is available since SDL 3.1.3. |
| 137 | + * |
| 138 | + * \sa SDL_HasSSE |
| 139 | + * \sa SDL_HasSSE2 |
| 140 | + * \sa SDL_HasSSE41 |
| 141 | + * \sa SDL_HasSSE42 |
| 142 | + } |
| 143 | +function SDL_HasSSE3: cbool; cdecl; |
| 144 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_HasSSE3' {$ENDIF} {$ENDIF}; |
| 145 | +
|
| 146 | +{* |
| 147 | + * Determine whether the CPU has SSE4.1 features. |
| 148 | + * |
| 149 | + * This always returns false on CPUs that aren't using Intel instruction sets. |
| 150 | + * |
| 151 | + * \returns true if the CPU has SSE4.1 features or false if not. |
| 152 | + * |
| 153 | + * \threadsafety It is safe to call this function from any thread. |
| 154 | + * |
| 155 | + * \since This function is available since SDL 3.1.3. |
| 156 | + * |
| 157 | + * \sa SDL_HasSSE |
| 158 | + * \sa SDL_HasSSE2 |
| 159 | + * \sa SDL_HasSSE3 |
| 160 | + * \sa SDL_HasSSE42 |
| 161 | + } |
| 162 | +function SDL_HasSSE41: cbool; cdecl; |
| 163 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_HasSSE41' {$ENDIF} {$ENDIF}; |
| 164 | + |
| 165 | +{* |
| 166 | + * Determine whether the CPU has SSE4.2 features. |
| 167 | + * |
| 168 | + * This always returns false on CPUs that aren't using Intel instruction sets. |
| 169 | + * |
| 170 | + * \returns true if the CPU has SSE4.2 features or false if not. |
| 171 | + * |
| 172 | + * \threadsafety It is safe to call this function from any thread. |
| 173 | + * |
| 174 | + * \since This function is available since SDL 3.1.3. |
| 175 | + * |
| 176 | + * \sa SDL_HasSSE |
| 177 | + * \sa SDL_HasSSE2 |
| 178 | + * \sa SDL_HasSSE3 |
| 179 | + * \sa SDL_HasSSE41 |
| 180 | + } |
| 181 | +function SDL_HasSSE42: cbool; cdecl; |
| 182 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_HasSSE42' {$ENDIF} {$ENDIF}; |
| 183 | +
|
| 184 | +{* |
| 185 | + * Determine whether the CPU has AVX features. |
| 186 | + * |
| 187 | + * This always returns false on CPUs that aren't using Intel instruction sets. |
| 188 | + * |
| 189 | + * \returns true if the CPU has AVX features or false if not. |
| 190 | + * |
| 191 | + * \threadsafety It is safe to call this function from any thread. |
| 192 | + * |
| 193 | + * \since This function is available since SDL 3.1.3. |
| 194 | + * |
| 195 | + * \sa SDL_HasAVX2 |
| 196 | + * \sa SDL_HasAVX512F |
| 197 | + } |
| 198 | +function SDL_HasAVX: cbool; cdecl; |
| 199 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_HasAVX' {$ENDIF} {$ENDIF}; |
| 200 | + |
| 201 | +{* |
| 202 | + * Determine whether the CPU has AVX2 features. |
| 203 | + * |
| 204 | + * This always returns false on CPUs that aren't using Intel instruction sets. |
| 205 | + * |
| 206 | + * \returns true if the CPU has AVX2 features or false if not. |
| 207 | + * |
| 208 | + * \threadsafety It is safe to call this function from any thread. |
| 209 | + * |
| 210 | + * \since This function is available since SDL 3.1.3. |
| 211 | + * |
| 212 | + * \sa SDL_HasAVX |
| 213 | + * \sa SDL_HasAVX512F |
| 214 | + } |
| 215 | +function SDL_HasAVX2: cbool; cdecl; |
| 216 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_HasAVX2' {$ENDIF} {$ENDIF}; |
| 217 | +
|
| 218 | +{* |
| 219 | + * Determine whether the CPU has AVX-512F (foundation) features. |
| 220 | + * |
| 221 | + * This always returns false on CPUs that aren't using Intel instruction sets. |
| 222 | + * |
| 223 | + * \returns true if the CPU has AVX-512F features or false if not. |
| 224 | + * |
| 225 | + * \threadsafety It is safe to call this function from any thread. |
| 226 | + * |
| 227 | + * \since This function is available since SDL 3.1.3. |
| 228 | + * |
| 229 | + * \sa SDL_HasAVX |
| 230 | + * \sa SDL_HasAVX2 |
| 231 | + } |
| 232 | +function SDL_HasAVX512F: cbool; cdecl; |
| 233 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_HasAVX512F' {$ENDIF} {$ENDIF}; |
| 234 | + |
| 235 | +{* |
| 236 | + * Determine whether the CPU has ARM SIMD (ARMv6) features. |
| 237 | + * |
| 238 | + * This is different from ARM NEON, which is a different instruction set. |
| 239 | + * |
| 240 | + * This always returns false on CPUs that aren't using ARM instruction sets. |
| 241 | + * |
| 242 | + * \returns true if the CPU has ARM SIMD features or false if not. |
| 243 | + * |
| 244 | + * \threadsafety It is safe to call this function from any thread. |
| 245 | + * |
| 246 | + * \since This function is available since SDL 3.1.3. |
| 247 | + * |
| 248 | + * \sa SDL_HasNEON |
| 249 | + } |
| 250 | +function SDL_HasARMSIMD: cbool; cdecl; |
| 251 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_HasARMSIMD' {$ENDIF} {$ENDIF}; |
| 252 | +
|
| 253 | +{* |
| 254 | + * Determine whether the CPU has NEON (ARM SIMD) features. |
| 255 | + * |
| 256 | + * This always returns false on CPUs that aren't using ARM instruction sets. |
| 257 | + * |
| 258 | + * \returns true if the CPU has ARM NEON features or false if not. |
| 259 | + * |
| 260 | + * \threadsafety It is safe to call this function from any thread. |
| 261 | + * |
| 262 | + * \since This function is available since SDL 3.1.3. |
| 263 | + } |
| 264 | +function SDL_HasNEON: cbool; cdecl; |
| 265 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_HasNEON' {$ENDIF} {$ENDIF}; |
| 266 | + |
| 267 | +{* |
| 268 | + * Determine whether the CPU has LSX (LOONGARCH SIMD) features. |
| 269 | + * |
| 270 | + * This always returns false on CPUs that aren't using LOONGARCH instruction |
| 271 | + * sets. |
| 272 | + * |
| 273 | + * \returns true if the CPU has LOONGARCH LSX features or false if not. |
| 274 | + * |
| 275 | + * \threadsafety It is safe to call this function from any thread. |
| 276 | + * |
| 277 | + * \since This function is available since SDL 3.1.3. |
| 278 | + } |
| 279 | +function SDL_HasLSX: cbool; cdecl; |
| 280 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_HasLSX' {$ENDIF} {$ENDIF}; |
| 281 | +
|
| 282 | +{* |
| 283 | + * Determine whether the CPU has LASX (LOONGARCH SIMD) features. |
| 284 | + * |
| 285 | + * This always returns false on CPUs that aren't using LOONGARCH instruction |
| 286 | + * sets. |
| 287 | + * |
| 288 | + * \returns true if the CPU has LOONGARCH LASX features or false if not. |
| 289 | + * |
| 290 | + * \threadsafety It is safe to call this function from any thread. |
| 291 | + * |
| 292 | + * \since This function is available since SDL 3.1.3. |
| 293 | + } |
| 294 | +function SDL_HasLASX: cbool; cdecl; |
| 295 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_HasLASX' {$ENDIF} {$ENDIF}; |
| 296 | + |
| 297 | +{* |
| 298 | + * Get the amount of RAM configured in the system. |
| 299 | + * |
| 300 | + * \returns the amount of RAM configured in the system in MiB. |
| 301 | + * |
| 302 | + * \threadsafety It is safe to call this function from any thread. |
| 303 | + * |
| 304 | + * \since This function is available since SDL 3.1.3. |
| 305 | + } |
| 306 | +function SDL_GetSystemRAM: cint; cdecl; |
| 307 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_GetSystemRAM' {$ENDIF} {$ENDIF}; |
| 308 | + |
| 309 | +{* |
| 310 | + * Report the alignment this system needs for SIMD allocations. |
| 311 | + * |
| 312 | + * This will return the minimum number of bytes to which a Pointer must be |
| 313 | + * aligned to be compatible with SIMD instructions on the current machine. For |
| 314 | + * example, if the machine supports SSE only, it will return 16, but if it |
| 315 | + * supports AVX-512F, it'll return 64 (etc). This only reports values for |
| 316 | + * instruction sets SDL knows about, so if your SDL build doesn't have |
| 317 | + * SDL_HasAVX512F(), then it might return 16 for the SSE support it sees and |
| 318 | + * not 64 for the AVX-512 instructions that exist but SDL doesn't know about. |
| 319 | + * Plan accordingly. |
| 320 | + * |
| 321 | + * \returns the alignment in bytes needed for available, known SIMD |
| 322 | + * instructions. |
| 323 | + * |
| 324 | + * \threadsafety It is safe to call this function from any thread. |
| 325 | + * |
| 326 | + * \since This function is available since SDL 3.1.3. |
| 327 | + * |
| 328 | + * \sa SDL_aligned_alloc |
| 329 | + * \sa SDL_aligned_free |
| 330 | + } |
| 331 | +function SDL_GetSIMDAlignment: csize_t; cdecl; |
| 332 | + external SDL_LibName {$IFDEF DELPHI} {$IFDEF MACOS} name '_SDL_GetSIMDAlignment' {$ENDIF} {$ENDIF}; |
| 333 | +
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