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Deepak V. ShreshtiDeepak V. Shreshti
Deepak V. Shreshti
authored and
Deepak V. Shreshti
committed
Removed UTF8 Chars
1 parent 2a72a70 commit c5ca907

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2 files changed

+63
-63
lines changed

2 files changed

+63
-63
lines changed

‎targets/TARGET_TOSHIBA/TARGET_TMPM4NR/Periph_driver/inc/txz_t32a.h‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -599,9 +599,9 @@ extern "C" {
599599
* @{
600600
*/
601601
#define T32A_NF_NON ((uint32_t)0x00000000) /*!< Nothing */
602-
#define T32A_NF_2 ((uint32_t)0x00000010) /*!< Noise Filter less than 2/ƒÓT0 */
603-
#define T32A_NF_4 ((uint32_t)0x00000020) /*!< Noise Filter less than 4/ƒÓT0 */
604-
#define T32A_NF_8 ((uint32_t)0x00000030) /*!< Noise Filter less than 8/ƒÓT0 */
602+
#define T32A_NF_2 ((uint32_t)0x00000010) /*!< Noise Filter less than 2/phiT0 */
603+
#define T32A_NF_4 ((uint32_t)0x00000020) /*!< Noise Filter less than 4/phiT0 */
604+
#define T32A_NF_8 ((uint32_t)0x00000030) /*!< Noise Filter less than 8/phiT0 */
605605
/**
606606
* @}
607607
*/ /* End of group T32A_NF */

‎targets/TARGET_TOSHIBA/TARGET_TMPM4NR/Periph_driver/src/txz_cg.c‎

Lines changed: 60 additions & 60 deletions
Original file line numberDiff line numberDiff line change
@@ -78,51 +78,51 @@ extern "C" {
7878

7979
#define CG_PRCK_MASK ((uint32_t)0x00000F00) /*!< CG PRCK mask */
8080

81-
#define CG_PRCK_1 ((uint32_t)0x00000000) /*!< CG ƒÓT0 fc register value */
82-
#define CG_PRCK_2 ((uint32_t)0x00000100) /*!< CG ƒÓT0 fc/2 register value */
83-
#define CG_PRCK_4 ((uint32_t)0x00000200) /*!< CG ƒÓT0 fc/4 register value */
84-
#define CG_PRCK_8 ((uint32_t)0x00000300) /*!< CG ƒÓT0 fc/8 register value */
85-
#define CG_PRCK_16 ((uint32_t)0x00000400) /*!< CG ƒÓT0 fc/16 register value */
86-
#define CG_PRCK_32 ((uint32_t)0x00000500) /*!< CG ƒÓT0 fc/32 register value */
87-
#define CG_PRCK_64 ((uint32_t)0x00000600) /*!< CG ƒÓT0 fc/64 register value */
88-
#define CG_PRCK_128 ((uint32_t)0x00000700) /*!< CG ƒÓT0 fc/128 register value */
89-
#define CG_PRCK_256 ((uint32_t)0x00000800) /*!< CG ƒÓT0 fc/256 register value */
90-
#define CG_PRCK_512 ((uint32_t)0x00000900) /*!< CG ƒÓT0 fc/512 register value */
81+
#define CG_PRCK_1 ((uint32_t)0x00000000) /*!< CG phiT0 fc register value */
82+
#define CG_PRCK_2 ((uint32_t)0x00000100) /*!< CG phiT0 fc/2 register value */
83+
#define CG_PRCK_4 ((uint32_t)0x00000200) /*!< CG phiT0 fc/4 register value */
84+
#define CG_PRCK_8 ((uint32_t)0x00000300) /*!< CG phiT0 fc/8 register value */
85+
#define CG_PRCK_16 ((uint32_t)0x00000400) /*!< CG phiT0 fc/16 register value */
86+
#define CG_PRCK_32 ((uint32_t)0x00000500) /*!< CG phiT0 fc/32 register value */
87+
#define CG_PRCK_64 ((uint32_t)0x00000600) /*!< CG phiT0 fc/64 register value */
88+
#define CG_PRCK_128 ((uint32_t)0x00000700) /*!< CG phiT0 fc/128 register value */
89+
#define CG_PRCK_256 ((uint32_t)0x00000800) /*!< CG phiT0 fc/256 register value */
90+
#define CG_PRCK_512 ((uint32_t)0x00000900) /*!< CG phiT0 fc/512 register value */
9191

9292
#define CG_PRCKST_MASK ((uint32_t)0x0F000000) /*!< CG PRCKST mask */
9393

94-
#define CG_PRCKST_1 ((uint32_t)0x00000000) /*!< CG ƒÓT0 fc register status */
95-
#define CG_PRCKST_2 ((uint32_t)0x01000000) /*!< CG ƒÓT0 fc/2 register status */
96-
#define CG_PRCKST_4 ((uint32_t)0x02000000) /*!< CG ƒÓT0 fc/4 register status */
97-
#define CG_PRCKST_8 ((uint32_t)0x03000000) /*!< CG ƒÓT0 fc/8 register status */
98-
#define CG_PRCKST_16 ((uint32_t)0x04000000) /*!< CG ƒÓT0 fc/16 register status */
99-
#define CG_PRCKST_32 ((uint32_t)0x05000000) /*!< CG ƒÓT0 fc/32 register status */
100-
#define CG_PRCKST_64 ((uint32_t)0x06000000) /*!< CG ƒÓT0 fc/64 register status */
101-
#define CG_PRCKST_128 ((uint32_t)0x07000000) /*!< CG ƒÓT0 fc/128 register status */
102-
#define CG_PRCKST_256 ((uint32_t)0x08000000) /*!< CG ƒÓT0 fc/256 register status */
103-
#define CG_PRCKST_512 ((uint32_t)0x09000000) /*!< CG ƒÓT0 fc/512 register status */
104-
105-
#define CG_PRCK_1_DIV ((uint32_t)0x00000001) /*!< CG ƒÓT0 fc division value */
106-
#define CG_PRCK_2_DIV ((uint32_t)0x00000002) /*!< CG ƒÓT0 fc/2 division value */
107-
#define CG_PRCK_4_DIV ((uint32_t)0x00000004) /*!< CG ƒÓT0 fc/4 division value */
108-
#define CG_PRCK_8_DIV ((uint32_t)0x00000008) /*!< CG ƒÓT0 fc/8 division value */
109-
#define CG_PRCK_16_DIV ((uint32_t)0x00000010) /*!< CG ƒÓT0 fc/16 division value */
110-
#define CG_PRCK_32_DIV ((uint32_t)0x00000020) /*!< CG ƒÓT0 fc/32 division value */
111-
#define CG_PRCK_64_DIV ((uint32_t)0x00000040) /*!< CG ƒÓT0 fc/64 division value */
112-
#define CG_PRCK_128_DIV ((uint32_t)0x00000080) /*!< CG ƒÓT0 fc/128 division value */
113-
#define CG_PRCK_256_DIV ((uint32_t)0x00000100) /*!< CG ƒÓT0 fc/256 division value */
114-
#define CG_PRCK_512_DIV ((uint32_t)0x00000200) /*!< CG ƒÓT0 fc/512 division value */
94+
#define CG_PRCKST_1 ((uint32_t)0x00000000) /*!< CG phiT0 fc register status */
95+
#define CG_PRCKST_2 ((uint32_t)0x01000000) /*!< CG phiT0 fc/2 register status */
96+
#define CG_PRCKST_4 ((uint32_t)0x02000000) /*!< CG phiT0 fc/4 register status */
97+
#define CG_PRCKST_8 ((uint32_t)0x03000000) /*!< CG phiT0 fc/8 register status */
98+
#define CG_PRCKST_16 ((uint32_t)0x04000000) /*!< CG phiT0 fc/16 register status */
99+
#define CG_PRCKST_32 ((uint32_t)0x05000000) /*!< CG phiT0 fc/32 register status */
100+
#define CG_PRCKST_64 ((uint32_t)0x06000000) /*!< CG phiT0 fc/64 register status */
101+
#define CG_PRCKST_128 ((uint32_t)0x07000000) /*!< CG phiT0 fc/128 register status */
102+
#define CG_PRCKST_256 ((uint32_t)0x08000000) /*!< CG phiT0 fc/256 register status */
103+
#define CG_PRCKST_512 ((uint32_t)0x09000000) /*!< CG phiT0 fc/512 register status */
104+
105+
#define CG_PRCK_1_DIV ((uint32_t)0x00000001) /*!< CG phiT0 fc division value */
106+
#define CG_PRCK_2_DIV ((uint32_t)0x00000002) /*!< CG phiT0 fc/2 division value */
107+
#define CG_PRCK_4_DIV ((uint32_t)0x00000004) /*!< CG phiT0 fc/4 division value */
108+
#define CG_PRCK_8_DIV ((uint32_t)0x00000008) /*!< CG phiT0 fc/8 division value */
109+
#define CG_PRCK_16_DIV ((uint32_t)0x00000010) /*!< CG phiT0 fc/16 division value */
110+
#define CG_PRCK_32_DIV ((uint32_t)0x00000020) /*!< CG phiT0 fc/32 division value */
111+
#define CG_PRCK_64_DIV ((uint32_t)0x00000040) /*!< CG phiT0 fc/64 division value */
112+
#define CG_PRCK_128_DIV ((uint32_t)0x00000080) /*!< CG phiT0 fc/128 division value */
113+
#define CG_PRCK_256_DIV ((uint32_t)0x00000100) /*!< CG phiT0 fc/256 division value */
114+
#define CG_PRCK_512_DIV ((uint32_t)0x00000200) /*!< CG phiT0 fc/512 division value */
115115

116116

117117
#define CG_MCKSELPST_MASK ((uint32_t)0xC0000000) /*!< CG MCKSEL mask */
118118

119-
#define CG_MCKSELPST_1 ((uint32_t)0x00000000) /*!< CG ƒÓT0 fc/PRCK value */
120-
#define CG_MCKSELPST_2 ((uint32_t)0x40000000) /*!< CG ƒÓT0 fc/PRCK/2 value */
121-
#define CG_MCKSELPST_4 ((uint32_t)0x80000000) /*!< CG ƒÓT0 fc/PRCK/4 value */
119+
#define CG_MCKSELPST_1 ((uint32_t)0x00000000) /*!< CG phiT0 fc/PRCK value */
120+
#define CG_MCKSELPST_2 ((uint32_t)0x40000000) /*!< CG phiT0 fc/PRCK/2 value */
121+
#define CG_MCKSELPST_4 ((uint32_t)0x80000000) /*!< CG phiT0 fc/PRCK/4 value */
122122

123-
#define CG_FSYSM_1_DIV ((uint32_t)0x00000001) /*!< CG fsysm ƒÓT0 division value */
124-
#define CG_FSYSM_2_DIV ((uint32_t)0x00000002) /*!< CG fsysm ƒÓT0/2 division value */
125-
#define CG_FSYSM_4_DIV ((uint32_t)0x00000004) /*!< CG fsysm ƒÓT0/4 division value */
123+
#define CG_FSYSM_1_DIV ((uint32_t)0x00000001) /*!< CG fsysm phiT0 division value */
124+
#define CG_FSYSM_2_DIV ((uint32_t)0x00000002) /*!< CG fsysm phiT0/2 division value */
125+
#define CG_FSYSM_4_DIV ((uint32_t)0x00000004) /*!< CG fsysm phiT0/4 division value */
126126

127127
#define CG_IHOSC_DISABLE ((uint32_t)0x00000000) /*!< Internal high-speed oscillator disable */
128128
#define CG_IHOSC_ENABLE ((uint32_t)0x00000001) /*!< Internal high-speed oscillator enable */
@@ -284,34 +284,34 @@ uint32_t cg_get_phyt0(cg_t *p_obj)
284284
}
285285

286286
switch (p_obj->p_instance->SYSCR & CG_PRCKST_MASK) {
287-
case CG_PRCKST_1: /* ƒÓT0 -> fc */
287+
case CG_PRCKST_1: /* phiT0 -> fc */
288288
result /= CG_PRCK_1_DIV;
289289
break;
290-
case CG_PRCKST_2: /* ƒÓT0 -> fc/2 */
290+
case CG_PRCKST_2: /* phiT0 -> fc/2 */
291291
result /= CG_PRCK_2_DIV;
292292
break;
293-
case CG_PRCKST_4: /* ƒÓT0 -> fc/4 */
293+
case CG_PRCKST_4: /* phiT0 -> fc/4 */
294294
result /= CG_PRCK_4_DIV;
295295
break;
296-
case CG_PRCKST_8: /* ƒÓT0 -> fc/8 */
296+
case CG_PRCKST_8: /* phiT0 -> fc/8 */
297297
result /= CG_PRCK_8_DIV;
298298
break;
299-
case CG_PRCKST_16: /* ƒÓT0 -> fc/16 */
299+
case CG_PRCKST_16: /* phiT0 -> fc/16 */
300300
result /= CG_PRCK_16_DIV;
301301
break;
302-
case CG_PRCKST_32: /* ƒÓT0 -> fc/32 */
302+
case CG_PRCKST_32: /* phiT0 -> fc/32 */
303303
result /= CG_PRCK_32_DIV;
304304
break;
305-
case CG_PRCKST_64: /* ƒÓT0 -> fc/64 */
305+
case CG_PRCKST_64: /* phiT0 -> fc/64 */
306306
result /= CG_PRCK_64_DIV;
307307
break;
308-
case CG_PRCKST_128: /* ƒÓT0 -> fc/128 */
308+
case CG_PRCKST_128: /* phiT0 -> fc/128 */
309309
result /= CG_PRCK_128_DIV;
310310
break;
311-
case CG_PRCKST_256: /* ƒÓT0 -> fc/256 */
311+
case CG_PRCKST_256: /* phiT0 -> fc/256 */
312312
result /= CG_PRCK_256_DIV;
313313
break;
314-
case CG_PRCKST_512: /* ƒÓT0 -> fc/512 */
314+
case CG_PRCKST_512: /* phiT0 -> fc/512 */
315315
result /= CG_PRCK_512_DIV;
316316
break;
317317
default:
@@ -369,34 +369,34 @@ uint32_t cg_get_mphyt0(cg_t *p_obj)
369369
break;
370370
}
371371
switch (p_obj->p_instance->SYSCR & CG_PRCKST_MASK) {
372-
case CG_PRCKST_1: /* ƒÓT0 -> fc */
372+
case CG_PRCKST_1: /* phiT0 -> fc */
373373
result /= CG_PRCK_1_DIV;
374374
break;
375-
case CG_PRCKST_2: /* ƒÓT0 -> fc/2 */
375+
case CG_PRCKST_2: /* phiT0 -> fc/2 */
376376
result /= CG_PRCK_2_DIV;
377377
break;
378-
case CG_PRCKST_4: /* ƒÓT0 -> fc/4 */
378+
case CG_PRCKST_4: /* phiT0 -> fc/4 */
379379
result /= CG_PRCK_4_DIV;
380380
break;
381-
case CG_PRCKST_8: /* ƒÓT0 -> fc/8 */
381+
case CG_PRCKST_8: /* phiT0 -> fc/8 */
382382
result /= CG_PRCK_8_DIV;
383383
break;
384-
case CG_PRCKST_16: /* ƒÓT0 -> fc/16 */
384+
case CG_PRCKST_16: /* phiT0 -> fc/16 */
385385
result /= CG_PRCK_16_DIV;
386386
break;
387-
case CG_PRCKST_32: /* ƒÓT0 -> fc/32 */
387+
case CG_PRCKST_32: /* phiT0 -> fc/32 */
388388
result /= CG_PRCK_32_DIV;
389389
break;
390-
case CG_PRCKST_64: /* ƒÓT0 -> fc/64 */
390+
case CG_PRCKST_64: /* phiT0 -> fc/64 */
391391
result /= CG_PRCK_64_DIV;
392392
break;
393-
case CG_PRCKST_128: /* ƒÓT0 -> fc/128 */
393+
case CG_PRCKST_128: /* phiT0 -> fc/128 */
394394
result /= CG_PRCK_128_DIV;
395395
break;
396-
case CG_PRCKST_256: /* ƒÓT0 -> fc/256 */
396+
case CG_PRCKST_256: /* phiT0 -> fc/256 */
397397
result /= CG_PRCK_256_DIV;
398398
break;
399-
case CG_PRCKST_512: /* ƒÓT0 -> fc/512 */
399+
case CG_PRCKST_512: /* phiT0 -> fc/512 */
400400
result /= CG_PRCK_512_DIV;
401401
break;
402402
default:
@@ -405,13 +405,13 @@ uint32_t cg_get_mphyt0(cg_t *p_obj)
405405
}
406406

407407
switch (p_obj->p_instance->SYSCR & CG_MCKSELPST_MASK) {
408-
case CG_MCKSELPST_1: /* ƒÓT0 -> fc/PRCK */
408+
case CG_MCKSELPST_1: /* phiT0 -> fc/PRCK */
409409
result /= CG_FSYSM_1_DIV;
410410
break;
411-
case CG_MCKSELPST_2: /* ƒÓT0 -> fc/PRCK/2 */
411+
case CG_MCKSELPST_2: /* phiT0 -> fc/PRCK/2 */
412412
result /= CG_FSYSM_2_DIV;
413413
break;
414-
case CG_MCKSELPST_4: /* ƒÓT0 -> fc/PRCK/4 */
414+
case CG_MCKSELPST_4: /* phiT0 -> fc/PRCK/4 */
415415
result /= CG_FSYSM_4_DIV;
416416
break;
417417
default:

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