@@ -38,7 +38,7 @@ extern "C" {
3838
3939#if 0
4040typedef enum {
41-
41+
4242#if defined(SCU_INIT_IONSSET_VAL ) && (SCU_INIT_IONSSET_VAL & (1 << 0 ))
4343 GPIO_A = (int ) NU_MODNAME (GPIOA_BASE + NS_OFFSET , 0 , 0 ),
4444#else
@@ -76,16 +76,16 @@ typedef enum {
7676#endif
7777
7878#if defined(SCU_INIT_IONSSET_VAL ) && (SCU_INIT_IONSSET_VAL & (1 << 6 ))
79- GPIO_G = (int ) NU_MODNAME (GPIOF_BASE + NS_OFFSET , 6 , 0 )
79+ GPIO_G = (int ) NU_MODNAME (GPIOG_BASE + NS_OFFSET , 6 , 0 ),
8080#else
81- GPIO_G = (int ) NU_MODNAME (GPIOF_BASE , 6 , 0 )
81+ GPIO_G = (int ) NU_MODNAME (GPIOG_BASE , 6 , 0 ),
8282#endif
8383
8484} GPIOName ;
8585#endif
8686
8787typedef enum {
88-
88+
8989#if defined(SCU_INIT_PNSSET2_VAL ) && (SCU_INIT_PNSSET2_VAL & (1 << 3 ))
9090 ADC_0_0 = (int ) NU_MODNAME (EADC0_BASE + NS_OFFSET , 0 , 0 ),
9191 ADC_0_1 = (int ) NU_MODNAME (EADC0_BASE + NS_OFFSET , 0 , 1 ),
@@ -102,7 +102,7 @@ typedef enum {
102102 ADC_0_12 = (int ) NU_MODNAME (EADC0_BASE + NS_OFFSET , 0 , 12 ),
103103 ADC_0_13 = (int ) NU_MODNAME (EADC0_BASE + NS_OFFSET , 0 , 13 ),
104104 ADC_0_14 = (int ) NU_MODNAME (EADC0_BASE + NS_OFFSET , 0 , 14 ),
105- ADC_0_15 = (int ) NU_MODNAME (EADC0_BASE + NS_OFFSET , 0 , 15 )
105+ ADC_0_15 = (int ) NU_MODNAME (EADC0_BASE + NS_OFFSET , 0 , 15 ),
106106#else
107107 ADC_0_0 = (int ) NU_MODNAME (EADC0_BASE , 0 , 0 ),
108108 ADC_0_1 = (int ) NU_MODNAME (EADC0_BASE , 0 , 1 ),
@@ -119,61 +119,63 @@ typedef enum {
119119 ADC_0_12 = (int ) NU_MODNAME (EADC0_BASE , 0 , 12 ),
120120 ADC_0_13 = (int ) NU_MODNAME (EADC0_BASE , 0 , 13 ),
121121 ADC_0_14 = (int ) NU_MODNAME (EADC0_BASE , 0 , 14 ),
122- ADC_0_15 = (int ) NU_MODNAME (EADC0_BASE , 0 , 15 )
122+ ADC_0_15 = (int ) NU_MODNAME (EADC0_BASE , 0 , 15 ),
123123#endif
124124
125125} ADCName ;
126126
127127typedef enum {
128+
128129#if defined(SCU_INIT_PNSSET2_VAL ) && (SCU_INIT_PNSSET2_VAL & (1 << 7 ))
129130 DAC_0_0 = (int ) NU_MODNAME (DAC0_BASE + NS_OFFSET , 0 , 0 ),
130- DAC_1_0 = (int ) NU_MODNAME (DAC1_BASE + NS_OFFSET , 1 , 0 )
131+ DAC_1_0 = (int ) NU_MODNAME (DAC1_BASE + NS_OFFSET , 1 , 0 ),
131132#else
132133 DAC_0_0 = (int ) NU_MODNAME (DAC0_BASE , 0 , 0 ),
133- DAC_1_0 = (int ) NU_MODNAME (DAC1_BASE , 1 , 0 )
134+ DAC_1_0 = (int ) NU_MODNAME (DAC1_BASE , 1 , 0 ),
134135#endif
136+
135137} DACName ;
136138
137139typedef enum {
138140
139- #if defined(SCU_INIT_PNSSET3_VAL ) && (SCU_INIT_PNSSET3_VAL & (1 << 16 ))
141+ #if defined(SCU_INIT_PNSSET3_VAL ) && (SCU_INIT_PNSSET3_VAL & (1 << 16 ))
140142 UART_0 = (int ) NU_MODNAME (UART0_BASE + NS_OFFSET , 0 , 0 ),
141143#else
142144 UART_0 = (int ) NU_MODNAME (UART0_BASE , 0 , 0 ),
143145#endif
144146
145- #if defined(SCU_INIT_PNSSET3_VAL ) && (SCU_INIT_PNSSET3_VAL & (1 << 17 ))
147+ #if defined(SCU_INIT_PNSSET3_VAL ) && (SCU_INIT_PNSSET3_VAL & (1 << 17 ))
146148 UART_1 = (int ) NU_MODNAME (UART1_BASE + NS_OFFSET , 1 , 0 ),
147149#else
148150 UART_1 = (int ) NU_MODNAME (UART1_BASE , 1 , 0 ),
149151#endif
150152
151- #if defined(SCU_INIT_PNSSET3_VAL ) && (SCU_INIT_PNSSET3_VAL & (1 << 18 ))
153+ #if defined(SCU_INIT_PNSSET3_VAL ) && (SCU_INIT_PNSSET3_VAL & (1 << 18 ))
152154 UART_2 = (int ) NU_MODNAME (UART2_BASE + NS_OFFSET , 2 , 0 ),
153155#else
154156 UART_2 = (int ) NU_MODNAME (UART2_BASE , 2 , 0 ),
155157#endif
156158
157- #if defined(SCU_INIT_PNSSET3_VAL ) && (SCU_INIT_PNSSET3_VAL & (0x01 << 19 ))
159+ #if defined(SCU_INIT_PNSSET3_VAL ) && (SCU_INIT_PNSSET3_VAL & (1 << 19 ))
158160 UART_3 = (int ) NU_MODNAME (UART3_BASE + NS_OFFSET , 3 , 0 ),
159161#else
160162 UART_3 = (int ) NU_MODNAME (UART3_BASE , 3 , 0 ),
161163#endif
162164
163- #if defined(SCU_INIT_PNSSET3_VAL ) && (SCU_INIT_PNSSET3_VAL & (0x01 << 20 ))
165+ #if defined(SCU_INIT_PNSSET3_VAL ) && (SCU_INIT_PNSSET3_VAL & (1 << 20 ))
164166 UART_4 = (int ) NU_MODNAME (UART4_BASE + NS_OFFSET , 4 , 0 ),
165167#else
166168 UART_4 = (int ) NU_MODNAME (UART4_BASE , 4 , 0 ),
167169#endif
168170
169- #if defined(SCU_INIT_PNSSET3_VAL ) && (SCU_INIT_PNSSET3_VAL & (0x01 << 21 ))
171+ #if defined(SCU_INIT_PNSSET3_VAL ) && (SCU_INIT_PNSSET3_VAL & (1 << 21 ))
170172 UART_5 = (int ) NU_MODNAME (UART5_BASE + NS_OFFSET , 5 , 0 ),
171173#else
172174 UART_5 = (int ) NU_MODNAME (UART5_BASE , 5 , 0 ),
173175#endif
174176
175177 // NOTE: board-specific
176- STDIO_UART = UART_0
178+ STDIO_UART = UART_0 ,
177179
178180} UARTName ;
179181
@@ -204,15 +206,15 @@ typedef enum {
204206#endif
205207
206208#if defined(SCU_INIT_PNSSET3_VAL ) && (SCU_INIT_PNSSET3_VAL & (1 << 5 ))
207- SPI_5 = (int ) NU_MODNAME (SPI5_BASE + NS_OFFSET , 5 , 0 )
209+ SPI_5 = (int ) NU_MODNAME (SPI5_BASE + NS_OFFSET , 5 , 0 ),
208210#else
209- SPI_5 = (int ) NU_MODNAME (SPI5_BASE , 5 , 0 )
211+ SPI_5 = (int ) NU_MODNAME (SPI5_BASE , 5 , 0 ),
210212#endif
211213
212214} SPIName ;
213215
214216typedef enum {
215-
217+
216218#if defined(SCU_INIT_PNSSET4_VAL ) && (SCU_INIT_PNSSET4_VAL & (1 << 0 ))
217219 I2C_0 = (int ) NU_MODNAME (I2C0_BASE + NS_OFFSET , 0 , 0 ),
218220#else
@@ -226,9 +228,9 @@ typedef enum {
226228#endif
227229
228230#if defined(SCU_INIT_PNSSET4_VAL ) && (SCU_INIT_PNSSET4_VAL & (1 << 2 ))
229- I2C_2 = (int ) NU_MODNAME (I2C2_BASE + NS_OFFSET , 2 , 0 )
231+ I2C_2 = (int ) NU_MODNAME (I2C2_BASE + NS_OFFSET , 2 , 0 ),
230232#else
231- I2C_2 = (int ) NU_MODNAME (I2C2_BASE , 2 , 0 )
233+ I2C_2 = (int ) NU_MODNAME (I2C2_BASE , 2 , 0 ),
232234#endif
233235
234236} I2CName ;
@@ -274,7 +276,7 @@ typedef enum {
274276 /* TMR0/1 are hard-wired to Secure mode */
275277 TIMER_0 = (int ) NU_MODNAME (TMR01_BASE , 0 , 0 ),
276278 TIMER_1 = (int ) NU_MODNAME (TMR01_BASE + 0x100 , 1 , 0 ),
277-
279+
278280#if defined(SCU_INIT_PNSSET2_VAL ) && (SCU_INIT_PNSSET2_VAL & (1 << 17 ))
279281 TIMER_2 = (int ) NU_MODNAME (TMR23_BASE + NS_OFFSET , 2 , 0 ),
280282 TIMER_3 = (int ) NU_MODNAME (TMR23_BASE + NS_OFFSET + 0x100 , 3 , 0 ),
@@ -286,11 +288,11 @@ typedef enum {
286288} TIMERName ;
287289
288290typedef enum {
289-
291+
290292#if defined(SCU_INIT_PNSSET2_VAL ) && (SCU_INIT_PNSSET2_VAL & (1 << 1 ))
291- RTC_0 = (int ) NU_MODNAME (RTC_BASE + NS_OFFSET , 0 , 0 )
293+ RTC_0 = (int ) NU_MODNAME (RTC_BASE + NS_OFFSET , 0 , 0 ),
292294#else
293- RTC_0 = (int ) NU_MODNAME (RTC_BASE , 0 , 0 )
295+ RTC_0 = (int ) NU_MODNAME (RTC_BASE , 0 , 0 ),
294296#endif
295297
296298} RTCName ;
@@ -301,38 +303,39 @@ typedef enum {
301303 DMA_0 = (int ) NU_MODNAME (PDMA0_BASE , 0 , 0 ),
302304
303305#if defined(SCU_INIT_PNSSET0_VAL ) && (SCU_INIT_PNSSET0_VAL & (1 << 24 ))
304- DMA_1 = (int ) NU_MODNAME (PDMA1_BASE + NS_OFFSET , 1 , 0 )
306+ DMA_1 = (int ) NU_MODNAME (PDMA1_BASE + NS_OFFSET , 1 , 0 ),
305307#else
306- DMA_1 = (int ) NU_MODNAME (PDMA1_BASE , 1 , 0 )
308+ DMA_1 = (int ) NU_MODNAME (PDMA1_BASE , 1 , 0 ),
307309#endif
308310
309311} DMAName ;
310312
311313typedef enum {
312314
313315#if defined(SCU_INIT_PNSSET0_VAL ) && (SCU_INIT_PNSSET0_VAL & (1 << 13 ))
314- SD_0 = (int ) NU_MODNAME (SDH0_BASE + NS_OFFSET , 0 , 0 )
316+ SD_0 = (int ) NU_MODNAME (SDH0_BASE + NS_OFFSET , 0 , 0 ),
315317#else
316- SD_0 = (int ) NU_MODNAME (SDH0_BASE , 0 , 0 )
318+ SD_0 = (int ) NU_MODNAME (SDH0_BASE , 0 , 0 ),
317319#endif
318320
319321} SDName ;
320322
321323typedef enum {
322-
324+
323325#if defined(SCU_INIT_PNSSET5_VAL ) && (SCU_INIT_PNSSET5_VAL & (1 << 0 ))
324- CAN_0 = (int ) NU_MODNAME (CAN0_BASE + NS_OFFSET , 0 , 0 )
326+ CAN_0 = (int ) NU_MODNAME (CAN0_BASE + NS_OFFSET , 0 , 0 ),
325327#else
326- CAN_0 = (int ) NU_MODNAME (CAN0_BASE , 0 , 0 )
328+ CAN_0 = (int ) NU_MODNAME (CAN0_BASE , 0 , 0 ),
327329#endif
328330
329331} CANName ;
330332
331333typedef enum {
334+
332335#if defined(SCU_INIT_PNSSET5_VAL ) && (SCU_INIT_PNSSET5_VAL & (1 << 25 ))
333- TRNG_0 = (int ) NU_MODNAME (TRNG_BASE + NS_OFFSET , 0 , 0 )
336+ TRNG_0 = (int ) NU_MODNAME (TRNG_BASE + NS_OFFSET , 0 , 0 ),
334337#else
335- TRNG_0 = (int ) NU_MODNAME (TRNG_BASE , 0 , 0 )
338+ TRNG_0 = (int ) NU_MODNAME (TRNG_BASE , 0 , 0 ),
336339#endif
337340
338341} TRNGName ;
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